54470176af
Function parameters marked with inreg are supposed to be allocated to SGPRs. However, for compute functions, this is ignored and function parameters are allocated to VGPRs. This fix modifies CC_AMDGPU_Func in AMDGPUCallingConv.td to use SGPRs if input arg is marked inreg. --------- Co-authored-by: Jun Wang <jun.wang7@amd.com>
59 lines
2.2 KiB
LLVM
59 lines
2.2 KiB
LLVM
; RUN: opt -mtriple amdgcn-- -passes='print<uniformity>' -disable-output %s 2>&1 | FileCheck %s
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; CHECK-LABEL: for function 'test_amdgpu_ps':
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; CHECK-DAG: DIVERGENT: ptr addrspace(4) %arg0
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; CHECK-DAG: DIVERGENT: <2 x i32> %arg3
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; CHECK-DAG: DIVERGENT: <3 x i32> %arg4
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; CHECK-DAG: DIVERGENT: float %arg5
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; CHECK-DAG: DIVERGENT: i32 %arg6
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; CHECK-NOT: DIVERGENT
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define amdgpu_ps void @test_amdgpu_ps(ptr addrspace(4) byref([4 x <16 x i8>]) %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
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ret void
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}
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; CHECK-LABEL: for function 'test_amdgpu_kernel':
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; CHECK-NOT: %arg0
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; CHECK-NOT: %arg1
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; CHECK-NOT: %arg2
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; CHECK-NOT: %arg3
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; CHECK-NOT: %arg4
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; CHECK-NOT: %arg5
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; CHECK-NOT: %arg6
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define amdgpu_kernel void @test_amdgpu_kernel(ptr addrspace(4) byref([4 x <16 x i8>]) %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
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ret void
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}
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; CHECK-LABEL: for function 'test_c':
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; CHECK: DIVERGENT:
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; CHECK: DIVERGENT:
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; CHECK: DIVERGENT:
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; CHECK: DIVERGENT:
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; CHECK: DIVERGENT:
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define void @test_c(ptr addrspace(5) byval([4 x <16 x i8>]) %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
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ret void
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}
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; CHECK-LABEL: for function 'test_amdgpu_cs_chain':
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; CHECK-DAG: DIVERGENT: ptr addrspace(4) %arg0
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; CHECK-DAG: DIVERGENT: <2 x i32> %arg3
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; CHECK-DAG: DIVERGENT: <3 x i32> %arg4
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; CHECK-DAG: DIVERGENT: float %arg5
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; CHECK-DAG: DIVERGENT: i32 %arg6
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; CHECK-NOT: DIVERGENT
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define amdgpu_cs_chain void @test_amdgpu_cs_chain(ptr addrspace(4) byref([4 x <16 x i8>]) %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
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ret void
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}
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; CHECK-LABEL: for function 'test_amdgpu_cs_chain_preserve':
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; CHECK-DAG: DIVERGENT: ptr addrspace(4) %arg0
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; CHECK-DAG: DIVERGENT: <2 x i32> %arg3
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; CHECK-DAG: DIVERGENT: <3 x i32> %arg4
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; CHECK-DAG: DIVERGENT: float %arg5
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; CHECK-DAG: DIVERGENT: i32 %arg6
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; CHECK-NOT: DIVERGENT
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define amdgpu_cs_chain_preserve void @test_amdgpu_cs_chain_preserve(ptr addrspace(4) byref([4 x <16 x i8>]) %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
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ret void
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}
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attributes #0 = { nounwind }
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