faa2c678aa
In order to enable the LLVM frontend to better analyze buffer operations (and to potentially enable more precise analyses on the backend), define versions of the raw and structured buffer intrinsics that use `ptr addrspace(8)` instead of `<4 x i32>` to represent their rsrc arguments. The new intrinsics are named by replacing `buffer.` with `buffer.ptr`. One advantage to these intrinsic definitions is that, instead of specifying that a buffer load/store will read/write some memory, we can indicate that the memory read or written will be based on the pointer argument. This means that, for example, a read from a `noalias` buffer can be pulled out of a loop that is modifying a distinct buffer. In the future, we will define custom PseudoSourceValues that will allow us to package up the (buffer, index, offset) triples that buffer intrinsics contain and allow for more precise backend analysis. This work also enables creating address space 7, which represents manipulation of raw buffers using native LLVM load and store instructions. Where tests simply used a buffer intrinsic while testing some other code path (such as the tests for VGPR spills), they have been updated to use the new intrinsic form. Tests that are "about" buffer intrinsics (for instance, those that ensure that they codegen as expected) have been duplicated, either within existing files or into new ones. Depends on D145441 Reviewed By: arsenm, #amdgpu Differential Revision: https://reviews.llvm.org/D147547
505 lines
24 KiB
LLVM
505 lines
24 KiB
LLVM
; RUN: opt -mtriple amdgcn-mesa-mesa3d -passes='print<uniformity>' -disable-output %s 2>&1 | FileCheck %s
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.buffer.atomic.swap.i32(
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define float @buffer_atomic_swap(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.buffer.atomic.swap.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i1 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.buffer.atomic.add.i32(
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define float @buffer_atomic_add(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.buffer.atomic.add.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i1 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.buffer.atomic.sub.i32(
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define float @buffer_atomic_sub(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.buffer.atomic.sub.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i1 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.buffer.atomic.smin.i32(
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define float @buffer_atomic_smin(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.buffer.atomic.smin.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i1 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.buffer.atomic.umin.i32(
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define float @buffer_atomic_umin(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.buffer.atomic.umin.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i1 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.buffer.atomic.smax.i32(
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define float @buffer_atomic_smax(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.buffer.atomic.smax.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i1 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.buffer.atomic.umax.i32(
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define float @buffer_atomic_umax(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.buffer.atomic.umax.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i1 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.buffer.atomic.and.i32(
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define float @buffer_atomic_and(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.buffer.atomic.and.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i1 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.buffer.atomic.or.i32(
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define float @buffer_atomic_or(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.buffer.atomic.or.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i1 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.buffer.atomic.xor.i32(
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define float @buffer_atomic_xor(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.buffer.atomic.xor.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i1 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.buffer.atomic.cmpswap(
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define float @buffer_atomic_cmpswap(<4 x i32> inreg %rsrc, i32 inreg %data, i32 inreg %cmp) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.buffer.atomic.cmpswap(i32 %data, i32 %cmp, <4 x i32> %rsrc, i32 0, i32 0, i1 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.swap.i32(
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define float @raw_buffer_atomic_swap(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.buffer.atomic.swap.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.add.i32(
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define float @raw_buffer_atomic_add(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.buffer.atomic.add.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.sub.i32(
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define float @raw_buffer_atomic_sub(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.buffer.atomic.sub.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.smin.i32(
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define float @raw_buffer_atomic_smin(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.buffer.atomic.smin.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.umin.i32(
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define float @raw_buffer_atomic_umin(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.buffer.atomic.umin.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.smax.i32(
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define float @raw_buffer_atomic_smax(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.buffer.atomic.smax.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.umax.i32(
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define float @raw_buffer_atomic_umax(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.buffer.atomic.umax.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.and.i32(
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define float @raw_buffer_atomic_and(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.buffer.atomic.and.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.or.i32(
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define float @raw_buffer_atomic_or(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.buffer.atomic.or.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.xor.i32(
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define float @raw_buffer_atomic_xor(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.buffer.atomic.xor.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.buffer.atomic.cmpswap.i32(
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define float @raw_buffer_atomic_cmpswap(<4 x i32> inreg %rsrc, i32 inreg %data, i32 inreg %cmp) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.buffer.atomic.cmpswap.i32(i32 %data, i32 %cmp, <4 x i32> %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.swap.i32(
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define float @raw_ptr_buffer_atomic_swap(ptr addrspace(8) inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.swap.i32(i32 %data, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.add.i32(
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define float @raw_ptr_buffer_atomic_add(ptr addrspace(8) inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.add.i32(i32 %data, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.sub.i32(
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define float @raw_ptr_buffer_atomic_sub(ptr addrspace(8) inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.sub.i32(i32 %data, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.smin.i32(
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define float @raw_ptr_buffer_atomic_smin(ptr addrspace(8) inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.smin.i32(i32 %data, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.umin.i32(
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define float @raw_ptr_buffer_atomic_umin(ptr addrspace(8) inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.umin.i32(i32 %data, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.smax.i32(
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define float @raw_ptr_buffer_atomic_smax(ptr addrspace(8) inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.smax.i32(i32 %data, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.umax.i32(
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define float @raw_ptr_buffer_atomic_umax(ptr addrspace(8) inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.umax.i32(i32 %data, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.and.i32(
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define float @raw_ptr_buffer_atomic_and(ptr addrspace(8) inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.and.i32(i32 %data, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.or.i32(
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define float @raw_ptr_buffer_atomic_or(ptr addrspace(8) inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.or.i32(i32 %data, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.xor.i32(
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define float @raw_ptr_buffer_atomic_xor(ptr addrspace(8) inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.xor.i32(i32 %data, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.i32(
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define float @raw_ptr_buffer_atomic_cmpswap(ptr addrspace(8) inreg %rsrc, i32 inreg %data, i32 inreg %cmp) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.i32(i32 %data, i32 %cmp, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.swap.i32(
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define float @struct_buffer_atomic_swap(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.struct.buffer.atomic.swap.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.add.i32(
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define float @struct_buffer_atomic_add(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.struct.buffer.atomic.add.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.sub.i32(
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define float @struct_buffer_atomic_sub(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.struct.buffer.atomic.sub.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.smin.i32(
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define float @struct_buffer_atomic_smin(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.struct.buffer.atomic.smin.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.umin.i32(
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define float @struct_buffer_atomic_umin(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.struct.buffer.atomic.umin.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
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ret float %r
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}
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;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.smax.i32(
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define float @struct_buffer_atomic_smax(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
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main_body:
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%orig = call i32 @llvm.amdgcn.struct.buffer.atomic.smax.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
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%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.umax.i32(
|
|
define float @struct_buffer_atomic_umax(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.buffer.atomic.umax.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.and.i32(
|
|
define float @struct_buffer_atomic_and(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.buffer.atomic.and.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.or.i32(
|
|
define float @struct_buffer_atomic_or(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.buffer.atomic.or.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.xor.i32(
|
|
define float @struct_buffer_atomic_xor(<4 x i32> inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.buffer.atomic.xor.i32(i32 %data, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.buffer.atomic.cmpswap.i32(
|
|
define float @struct_buffer_atomic_cmpswap(<4 x i32> inreg %rsrc, i32 inreg %data, i32 inreg %cmp) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.buffer.atomic.cmpswap.i32(i32 %data, i32 %cmp, <4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.swap.i32(
|
|
define float @struct_ptr_buffer_atomic_swap(ptr addrspace (8) inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.swap.i32(i32 %data, ptr addrspace (8) %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.add.i32(
|
|
define float @struct_ptr_buffer_atomic_add(ptr addrspace (8) inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.add.i32(i32 %data, ptr addrspace (8) %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.sub.i32(
|
|
define float @struct_ptr_buffer_atomic_sub(ptr addrspace (8) inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.sub.i32(i32 %data, ptr addrspace (8) %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.smin.i32(
|
|
define float @struct_ptr_buffer_atomic_smin(ptr addrspace (8) inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.smin.i32(i32 %data, ptr addrspace (8) %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.umin.i32(
|
|
define float @struct_ptr_buffer_atomic_umin(ptr addrspace (8) inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.umin.i32(i32 %data, ptr addrspace (8) %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.smax.i32(
|
|
define float @struct_ptr_buffer_atomic_smax(ptr addrspace (8) inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.smax.i32(i32 %data, ptr addrspace (8) %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.umax.i32(
|
|
define float @struct_ptr_buffer_atomic_umax(ptr addrspace (8) inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.umax.i32(i32 %data, ptr addrspace (8) %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.and.i32(
|
|
define float @struct_ptr_buffer_atomic_and(ptr addrspace (8) inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.and.i32(i32 %data, ptr addrspace (8) %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.or.i32(
|
|
define float @struct_ptr_buffer_atomic_or(ptr addrspace (8) inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.or.i32(i32 %data, ptr addrspace (8) %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.xor.i32(
|
|
define float @struct_ptr_buffer_atomic_xor(ptr addrspace (8) inreg %rsrc, i32 inreg %data) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.xor.i32(i32 %data, ptr addrspace (8) %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.i32(
|
|
define float @struct_ptr_buffer_atomic_cmpswap(ptr addrspace (8) inreg %rsrc, i32 inreg %data, i32 inreg %cmp) #0 {
|
|
main_body:
|
|
%orig = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.i32(i32 %data, i32 %cmp, ptr addrspace (8) %rsrc, i32 0, i32 0, i32 0, i32 0)
|
|
%r = bitcast i32 %orig to float
|
|
ret float %r
|
|
}
|
|
|
|
declare i32 @llvm.amdgcn.buffer.atomic.swap.i32(i32, <4 x i32>, i32, i32, i1) #0
|
|
declare i32 @llvm.amdgcn.buffer.atomic.add.i32(i32, <4 x i32>, i32, i32, i1) #0
|
|
declare i32 @llvm.amdgcn.buffer.atomic.sub.i32(i32, <4 x i32>, i32, i32, i1) #0
|
|
declare i32 @llvm.amdgcn.buffer.atomic.smin.i32(i32, <4 x i32>, i32, i32, i1) #0
|
|
declare i32 @llvm.amdgcn.buffer.atomic.umin.i32(i32, <4 x i32>, i32, i32, i1) #0
|
|
declare i32 @llvm.amdgcn.buffer.atomic.smax.i32(i32, <4 x i32>, i32, i32, i1) #0
|
|
declare i32 @llvm.amdgcn.buffer.atomic.umax.i32(i32, <4 x i32>, i32, i32, i1) #0
|
|
declare i32 @llvm.amdgcn.buffer.atomic.and.i32(i32, <4 x i32>, i32, i32, i1) #0
|
|
declare i32 @llvm.amdgcn.buffer.atomic.or.i32(i32, <4 x i32>, i32, i32, i1) #0
|
|
declare i32 @llvm.amdgcn.buffer.atomic.xor.i32(i32, <4 x i32>, i32, i32, i1) #0
|
|
declare i32 @llvm.amdgcn.buffer.atomic.cmpswap(i32, i32, <4 x i32>, i32, i32, i1) #0
|
|
|
|
declare i32 @llvm.amdgcn.raw.buffer.atomic.swap.i32(i32, <4 x i32>, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.raw.buffer.atomic.add.i32(i32, <4 x i32>, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.raw.buffer.atomic.sub.i32(i32, <4 x i32>, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.raw.buffer.atomic.smin.i32(i32, <4 x i32>, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.raw.buffer.atomic.umin.i32(i32, <4 x i32>, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.raw.buffer.atomic.smax.i32(i32, <4 x i32>, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.raw.buffer.atomic.umax.i32(i32, <4 x i32>, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.raw.buffer.atomic.and.i32(i32, <4 x i32>, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.raw.buffer.atomic.or.i32(i32, <4 x i32>, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.raw.buffer.atomic.xor.i32(i32, <4 x i32>, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.raw.buffer.atomic.cmpswap.i32(i32, i32, <4 x i32>, i32, i32, i32) #0
|
|
|
|
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.swap.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.add.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.sub.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.smin.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.umin.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.smax.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.umax.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.and.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.or.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.xor.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.i32(i32, i32, ptr addrspace(8) nocapture, i32, i32, i32) #1
|
|
|
|
declare i32 @llvm.amdgcn.struct.buffer.atomic.swap.i32(i32, <4 x i32>, i32, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.struct.buffer.atomic.add.i32(i32, <4 x i32>, i32, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.struct.buffer.atomic.sub.i32(i32, <4 x i32>, i32, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.struct.buffer.atomic.smin.i32(i32, <4 x i32>, i32, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.struct.buffer.atomic.umin.i32(i32, <4 x i32>, i32, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.struct.buffer.atomic.smax.i32(i32, <4 x i32>, i32, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.struct.buffer.atomic.umax.i32(i32, <4 x i32>, i32, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.struct.buffer.atomic.and.i32(i32, <4 x i32>, i32, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.struct.buffer.atomic.or.i32(i32, <4 x i32>, i32, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.struct.buffer.atomic.xor.i32(i32, <4 x i32>, i32, i32, i32, i32) #0
|
|
declare i32 @llvm.amdgcn.struct.buffer.atomic.cmpswap.i32(i32, i32, <4 x i32>, i32, i32, i32, i32) #0
|
|
|
|
declare i32 @llvm.amdgcn.struct.ptr.buffer.atomic.swap.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.struct.ptr.buffer.atomic.add.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.struct.ptr.buffer.atomic.sub.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.struct.ptr.buffer.atomic.smin.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.struct.ptr.buffer.atomic.umin.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.struct.ptr.buffer.atomic.smax.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.struct.ptr.buffer.atomic.umax.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.struct.ptr.buffer.atomic.and.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.struct.ptr.buffer.atomic.or.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.struct.ptr.buffer.atomic.xor.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32, i32) #1
|
|
declare i32 @llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.i32(i32, i32, ptr addrspace(8) nocapture, i32, i32, i32, i32) #1
|
|
|
|
attributes #0 = { nounwind }
|
|
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
|