db158c7c83
Refresh of the generic scheduling model to use A510 instead of A55. Main benefits are to the little core, and introducing SVE scheduling information. Changes tested on various OoO cores, no performance degradation is seen. Differential Revision: https://reviews.llvm.org/D156799
36 lines
1.2 KiB
LLVM
36 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -global-isel=1 -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
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declare void @use_addr(ptr)
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declare ptr @llvm.stacksave.p0()
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declare void @llvm.stackrestore.p0(ptr)
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define void @test_scoped_alloca(i64 %n) {
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; CHECK-LABEL: test_scoped_alloca:
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; CHECK: // %bb.0:
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; CHECK-NEXT: stp x29, x30, [sp, #-32]! // 16-byte Folded Spill
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; CHECK-NEXT: str x19, [sp, #16] // 8-byte Folded Spill
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; CHECK-NEXT: mov x29, sp
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; CHECK-NEXT: .cfi_def_cfa w29, 32
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; CHECK-NEXT: .cfi_offset w19, -16
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; CHECK-NEXT: .cfi_offset w30, -24
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; CHECK-NEXT: .cfi_offset w29, -32
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; CHECK-NEXT: add x9, x0, #15
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; CHECK-NEXT: mov x8, sp
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; CHECK-NEXT: mov x19, sp
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; CHECK-NEXT: and x9, x9, #0xfffffffffffffff0
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; CHECK-NEXT: sub x0, x8, x9
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; CHECK-NEXT: mov sp, x0
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; CHECK-NEXT: bl use_addr
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; CHECK-NEXT: mov sp, x19
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; CHECK-NEXT: mov sp, x29
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; CHECK-NEXT: ldr x19, [sp, #16] // 8-byte Folded Reload
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; CHECK-NEXT: ldp x29, x30, [sp], #32 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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%sp = call ptr @llvm.stacksave.p0()
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%addr = alloca i8, i64 %n
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call void @use_addr(ptr %addr)
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call void @llvm.stackrestore.p0(ptr %sp)
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ret void
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}
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