778fa4edaf
This adds some basic handling for bf16 constants, attempting to treat them a lot like fp16 constants where it can. Zero immediates get lowered to FMOVH0, others either get lowered to FMOVWHr(MOVi32imm) or use FMOVHi if they can. Without fp16 they get expanded. This may not always be optimal, but fixes a gap in our lowering. See llvm/test/CodeGen/AArch64/f16-imm.ll for the equivalent fp16 test. Differential Revision: https://reviews.llvm.org/D156649
122 lines
3.2 KiB
LLVM
122 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16
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; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16
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define bfloat @Const0() {
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; CHECK-LABEL: Const0:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: ret
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entry:
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ret bfloat 0xR0000
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}
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define bfloat @Const1() {
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; CHECK-FP16-LABEL: Const1:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fmov h0, #1.00000000
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const1:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI1_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI1_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret bfloat 0xR3C00
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}
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define bfloat @Const2() {
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; CHECK-FP16-LABEL: Const2:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fmov h0, #0.12500000
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const2:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI2_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI2_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret bfloat 0xR3000
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}
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define bfloat @Const3() {
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; CHECK-FP16-LABEL: Const3:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fmov h0, #30.00000000
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const3:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI3_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI3_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret bfloat 0xR4F80
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}
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define bfloat @Const4() {
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; CHECK-FP16-LABEL: Const4:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fmov h0, #31.00000000
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const4:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI4_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI4_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret bfloat 0xR4FC0
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}
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define bfloat @Const5() {
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; CHECK-FP16-LABEL: Const5:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: mov w8, #12272 // =0x2ff0
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; CHECK-FP16-NEXT: fmov h0, w8
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const5:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI5_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI5_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret bfloat 0xR2FF0
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}
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define bfloat @Const6() {
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; CHECK-FP16-LABEL: Const6:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: mov w8, #20417 // =0x4fc1
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; CHECK-FP16-NEXT: fmov h0, w8
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const6:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI6_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI6_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret bfloat 0xR4FC1
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}
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define bfloat @Const7() {
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; CHECK-FP16-LABEL: Const7:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: mov w8, #20480 // =0x5000
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; CHECK-FP16-NEXT: fmov h0, w8
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-LABEL: Const7:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: adrp x8, .LCPI7_0
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; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI7_0]
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; CHECK-NOFP16-NEXT: ret
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entry:
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ret bfloat 0xR5000
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}
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