Files
clang-p2996/llvm/test/CodeGen/AArch64/expand-select.ll
Harvin Iriawan db158c7c83 [AArch64] Update generic sched model to A510
Refresh of the generic scheduling model to use A510 instead of A55.
  Main benefits are to the little core, and introducing SVE scheduling information.
  Changes tested on various OoO cores, no performance degradation is seen.

  Differential Revision: https://reviews.llvm.org/D156799
2023-08-21 12:25:15 +01:00

62 lines
1.9 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64-unknown-linux-gnu -O3 %s -o - | FileCheck %s
define void @foo(i32 %In1, <2 x i128> %In2, <2 x i128> %In3, ptr %Out) {
; CHECK-LABEL: foo:
; CHECK: // %bb.0:
; CHECK-NEXT: and w8, w0, #0x1
; CHECK-NEXT: fmov s0, wzr
; CHECK-NEXT: ldr x11, [sp]
; CHECK-NEXT: fmov s1, w8
; CHECK-NEXT: ldp x9, x10, [sp, #8]
; CHECK-NEXT: cmeq v0.4s, v1.4s, v0.4s
; CHECK-NEXT: fmov w8, s0
; CHECK-NEXT: tst w8, #0x1
; CHECK-NEXT: csel x8, x5, x9, ne
; CHECK-NEXT: csel x9, x4, x11, ne
; CHECK-NEXT: stp x9, x8, [x10, #16]
; CHECK-NEXT: csel x8, x3, x7, ne
; CHECK-NEXT: csel x9, x2, x6, ne
; CHECK-NEXT: stp x9, x8, [x10]
; CHECK-NEXT: ret
%cond = and i32 %In1, 1
%cbool = icmp eq i32 %cond, 0
%res = select i1 %cbool, <2 x i128> %In2, <2 x i128> %In3
store <2 x i128> %res, ptr %Out
ret void
}
; Check case when scalar size is not power of 2.
define void @bar(i32 %In1, <2 x i96> %In2, <2 x i96> %In3, ptr %Out) {
; CHECK-LABEL: bar:
; CHECK: // %bb.0:
; CHECK-NEXT: and w8, w0, #0x1
; CHECK-NEXT: fmov s0, wzr
; CHECK-NEXT: ldr x11, [sp, #16]
; CHECK-NEXT: fmov s1, w8
; CHECK-NEXT: ldp x9, x10, [sp]
; CHECK-NEXT: cmeq v0.4s, v1.4s, v0.4s
; CHECK-NEXT: dup v1.4s, v0.s[0]
; CHECK-NEXT: mov x8, v1.d[1]
; CHECK-NEXT: lsr x8, x8, #32
; CHECK-NEXT: tst w8, #0x1
; CHECK-NEXT: fmov w8, s0
; CHECK-NEXT: csel x10, x5, x10, ne
; CHECK-NEXT: csel x9, x4, x9, ne
; CHECK-NEXT: stur x9, [x11, #12]
; CHECK-NEXT: tst w8, #0x1
; CHECK-NEXT: str w10, [x11, #20]
; CHECK-NEXT: csel x8, x2, x6, ne
; CHECK-NEXT: csel x9, x3, x7, ne
; CHECK-NEXT: str x8, [x11]
; CHECK-NEXT: str w9, [x11, #8]
; CHECK-NEXT: ret
%cond = and i32 %In1, 1
%cbool = icmp eq i32 %cond, 0
%res = select i1 %cbool, <2 x i96> %In2, <2 x i96> %In3
store <2 x i96> %res, ptr %Out
ret void
}