db158c7c83
Refresh of the generic scheduling model to use A510 instead of A55. Main benefits are to the little core, and introducing SVE scheduling information. Changes tested on various OoO cores, no performance degradation is seen. Differential Revision: https://reviews.llvm.org/D156799
323 lines
11 KiB
LLVM
323 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-pc-win32 | FileCheck %s
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define void @pass_va(i32 %count, ...) nounwind {
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; CHECK-LABEL: pass_va:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: str x30, [sp, #-80]! // 8-byte Folded Spill
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; CHECK-NEXT: add x8, sp, #24
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; CHECK-NEXT: add x0, sp, #24
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; CHECK-NEXT: stp x1, x2, [sp, #24]
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; CHECK-NEXT: stp x3, x4, [sp, #40]
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; CHECK-NEXT: stp x5, x6, [sp, #56]
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; CHECK-NEXT: str x7, [sp, #72]
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; CHECK-NEXT: str x8, [sp, #8]
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; CHECK-NEXT: bl other_func
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; CHECK-NEXT: ldr x30, [sp], #80 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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%ap = alloca ptr, align 8
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call void @llvm.va_start(ptr %ap)
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%ap2 = load ptr, ptr %ap, align 8
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call void @other_func(ptr %ap2)
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ret void
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}
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declare void @other_func(ptr) local_unnamed_addr
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declare void @llvm.va_start(ptr) nounwind
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declare void @llvm.va_copy(ptr, ptr) nounwind
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define ptr @f9(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, ...) nounwind {
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; CHECK-LABEL: f9:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: add x8, sp, #24
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; CHECK-NEXT: add x0, sp, #24
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; CHECK-NEXT: str x8, [sp, #8]
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; CHECK-NEXT: add sp, sp, #16
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; CHECK-NEXT: ret
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entry:
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%ap = alloca ptr, align 8
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call void @llvm.va_start(ptr %ap)
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%ap2 = load ptr, ptr %ap, align 8
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ret ptr %ap2
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}
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define ptr @f8(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, ...) nounwind {
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; CHECK-LABEL: f8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: add x8, sp, #16
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; CHECK-NEXT: add x0, sp, #16
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; CHECK-NEXT: str x8, [sp, #8]
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; CHECK-NEXT: add sp, sp, #16
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; CHECK-NEXT: ret
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entry:
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%ap = alloca ptr, align 8
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call void @llvm.va_start(ptr %ap)
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%ap2 = load ptr, ptr %ap, align 8
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ret ptr %ap2
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}
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define ptr @f7(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, ...) nounwind {
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; CHECK-LABEL: f7:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #32
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; CHECK-NEXT: add x8, sp, #24
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; CHECK-NEXT: add x0, sp, #24
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; CHECK-NEXT: str x7, [sp, #24]
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; CHECK-NEXT: str x8, [sp, #8]
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; CHECK-NEXT: add sp, sp, #32
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; CHECK-NEXT: ret
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entry:
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%ap = alloca ptr, align 8
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call void @llvm.va_start(ptr %ap)
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%ap2 = load ptr, ptr %ap, align 8
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ret ptr %ap2
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}
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define void @copy1(i64 %a0, ...) nounwind {
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; CHECK-LABEL: copy1:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #80
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; CHECK-NEXT: add x8, sp, #24
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; CHECK-NEXT: stp x1, x2, [sp, #24]
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; CHECK-NEXT: stp x3, x4, [sp, #40]
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; CHECK-NEXT: stp x5, x6, [sp, #56]
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; CHECK-NEXT: str x7, [sp, #72]
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; CHECK-NEXT: stp x8, x8, [sp], #80
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; CHECK-NEXT: ret
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entry:
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%ap = alloca ptr, align 8
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%cp = alloca ptr, align 8
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call void @llvm.va_start(ptr %ap)
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call void @llvm.va_copy(ptr %cp, ptr %ap)
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ret void
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}
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declare void @llvm.va_end(ptr)
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declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #1
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declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #1
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declare i32 @__stdio_common_vsprintf(i64, ptr, i64, ptr, ptr, ptr) local_unnamed_addr #3
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declare ptr @__local_stdio_printf_options() local_unnamed_addr #4
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define i32 @fp(ptr, i64, ptr, ...) local_unnamed_addr #6 {
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; CHECK-LABEL: fp:
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; CHECK: .seh_proc fp
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: stp x19, x20, [sp, #-96]! // 16-byte Folded Spill
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; CHECK-NEXT: .seh_save_regp_x x19, 96
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; CHECK-NEXT: str x21, [sp, #16] // 8-byte Folded Spill
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; CHECK-NEXT: .seh_save_reg x21, 16
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; CHECK-NEXT: stp x29, x30, [sp, #24] // 16-byte Folded Spill
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; CHECK-NEXT: .seh_save_fplr 24
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; CHECK-NEXT: add x29, sp, #24
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; CHECK-NEXT: .seh_add_fp 24
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; CHECK-NEXT: .seh_endprologue
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; CHECK-NEXT: add x8, x29, #32
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; CHECK-NEXT: mov x19, x2
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; CHECK-NEXT: mov x20, x1
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; CHECK-NEXT: mov x21, x0
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; CHECK-NEXT: stp x3, x4, [x29, #32]
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; CHECK-NEXT: stp x5, x6, [x29, #48]
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; CHECK-NEXT: str x7, [x29, #64]
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; CHECK-NEXT: str x8, [x29, #16]
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; CHECK-NEXT: bl __local_stdio_printf_options
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; CHECK-NEXT: ldr x8, [x0]
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; CHECK-NEXT: add x5, x29, #32
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; CHECK-NEXT: mov x1, x21
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; CHECK-NEXT: mov x2, x20
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; CHECK-NEXT: mov x3, x19
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; CHECK-NEXT: mov x4, xzr
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; CHECK-NEXT: orr x0, x8, #0x2
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; CHECK-NEXT: bl __stdio_common_vsprintf
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: csinv w0, w0, wzr, ge
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; CHECK-NEXT: .seh_startepilogue
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; CHECK-NEXT: ldp x29, x30, [sp, #24] // 16-byte Folded Reload
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; CHECK-NEXT: .seh_save_fplr 24
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; CHECK-NEXT: ldr x21, [sp, #16] // 8-byte Folded Reload
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; CHECK-NEXT: .seh_save_reg x21, 16
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; CHECK-NEXT: ldp x19, x20, [sp], #96 // 16-byte Folded Reload
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; CHECK-NEXT: .seh_save_regp_x x19, 96
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; CHECK-NEXT: .seh_endepilogue
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; CHECK-NEXT: ret
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; CHECK-NEXT: .seh_endfunclet
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; CHECK-NEXT: .seh_endproc
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%4 = alloca ptr, align 8
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call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #2
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call void @llvm.va_start(ptr nonnull %4)
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%5 = load ptr, ptr %4, align 8
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%6 = call ptr @__local_stdio_printf_options() #2
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%7 = load i64, ptr %6, align 8
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%8 = or i64 %7, 2
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%9 = call i32 @__stdio_common_vsprintf(i64 %8, ptr %0, i64 %1, ptr %2, ptr null, ptr %5) #2
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%10 = icmp sgt i32 %9, -1
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%11 = select i1 %10, i32 %9, i32 -1
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call void @llvm.va_end(ptr nonnull %4)
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call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #2
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ret i32 %11
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}
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attributes #6 = { "frame-pointer"="all" }
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define void @vla(i32, ptr, ...) local_unnamed_addr {
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; CHECK-LABEL: vla:
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; CHECK: .seh_proc vla
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: stp x19, x20, [sp, #-112]! // 16-byte Folded Spill
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; CHECK-NEXT: .seh_save_regp_x x19, 112
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; CHECK-NEXT: stp x21, x22, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: .seh_save_regp x21, 16
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; CHECK-NEXT: str x23, [sp, #32] // 8-byte Folded Spill
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; CHECK-NEXT: .seh_save_reg x23, 32
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; CHECK-NEXT: stp x29, x30, [sp, #40] // 16-byte Folded Spill
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; CHECK-NEXT: .seh_save_fplr 40
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; CHECK-NEXT: add x29, sp, #40
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; CHECK-NEXT: .seh_add_fp 40
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; CHECK-NEXT: .seh_endprologue
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: add x8, x29, #24
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; CHECK-NEXT: mov w9, w0
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; CHECK-NEXT: mov x19, x1
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; CHECK-NEXT: str x8, [x29, #16]
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; CHECK-NEXT: add x8, x9, #15
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; CHECK-NEXT: mov x23, sp
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; CHECK-NEXT: lsr x15, x8, #4
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; CHECK-NEXT: stp x2, x3, [x29, #24]
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; CHECK-NEXT: stp x4, x5, [x29, #40]
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; CHECK-NEXT: stp x6, x7, [x29, #56]
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; CHECK-NEXT: bl __chkstk
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; CHECK-NEXT: sub x20, sp, x15, lsl #4
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; CHECK-NEXT: mov sp, x20
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; CHECK-NEXT: ldr x21, [x29, #16]
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; CHECK-NEXT: sxtw x22, w0
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; CHECK-NEXT: bl __local_stdio_printf_options
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; CHECK-NEXT: ldr x8, [x0]
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; CHECK-NEXT: mov x1, x20
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; CHECK-NEXT: mov x2, x22
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; CHECK-NEXT: mov x3, x19
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; CHECK-NEXT: mov x4, xzr
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; CHECK-NEXT: mov x5, x21
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; CHECK-NEXT: orr x0, x8, #0x2
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; CHECK-NEXT: bl __stdio_common_vsprintf
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; CHECK-NEXT: mov sp, x23
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; CHECK-NEXT: .seh_startepilogue
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; CHECK-NEXT: sub sp, x29, #40
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; CHECK-NEXT: .seh_add_fp 40
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; CHECK-NEXT: ldp x29, x30, [sp, #40] // 16-byte Folded Reload
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; CHECK-NEXT: .seh_save_fplr 40
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; CHECK-NEXT: ldr x23, [sp, #32] // 8-byte Folded Reload
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; CHECK-NEXT: .seh_save_reg x23, 32
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; CHECK-NEXT: ldp x21, x22, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: .seh_save_regp x21, 16
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; CHECK-NEXT: ldp x19, x20, [sp], #112 // 16-byte Folded Reload
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; CHECK-NEXT: .seh_save_regp_x x19, 112
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; CHECK-NEXT: .seh_endepilogue
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; CHECK-NEXT: ret
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; CHECK-NEXT: .seh_endfunclet
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; CHECK-NEXT: .seh_endproc
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%3 = alloca ptr, align 8
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call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #5
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call void @llvm.va_start(ptr nonnull %3)
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%4 = zext i32 %0 to i64
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%5 = call ptr @llvm.stacksave()
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%6 = alloca i8, i64 %4, align 1
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%7 = load ptr, ptr %3, align 8
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%8 = sext i32 %0 to i64
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%9 = call ptr @__local_stdio_printf_options()
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%10 = load i64, ptr %9, align 8
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%11 = or i64 %10, 2
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%12 = call i32 @__stdio_common_vsprintf(i64 %11, ptr nonnull %6, i64 %8, ptr %1, ptr null, ptr %7)
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call void @llvm.va_end(ptr nonnull %3)
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call void @llvm.stackrestore(ptr %5)
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call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
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ret void
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}
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declare ptr @llvm.stacksave()
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declare void @llvm.stackrestore(ptr)
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define i32 @snprintf(ptr, i64, ptr, ...) local_unnamed_addr #5 {
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; CHECK-LABEL: snprintf:
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; CHECK: .seh_proc snprintf
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: sub sp, sp, #96
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; CHECK-NEXT: .seh_stackalloc 96
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; CHECK-NEXT: stp x19, x20, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: .seh_save_regp x19, 16
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; CHECK-NEXT: stp x21, x30, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: .seh_save_lrpair x21, 32
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; CHECK-NEXT: .seh_endprologue
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; CHECK-NEXT: add x8, sp, #56
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; CHECK-NEXT: mov x19, x2
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; CHECK-NEXT: mov x20, x1
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; CHECK-NEXT: mov x21, x0
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; CHECK-NEXT: stp x3, x4, [sp, #56]
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; CHECK-NEXT: stp x5, x6, [sp, #72]
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; CHECK-NEXT: str x7, [sp, #88]
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; CHECK-NEXT: str x8, [sp, #8]
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; CHECK-NEXT: bl __local_stdio_printf_options
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; CHECK-NEXT: ldr x8, [x0]
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; CHECK-NEXT: add x5, sp, #56
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; CHECK-NEXT: mov x1, x21
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; CHECK-NEXT: mov x2, x20
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; CHECK-NEXT: mov x3, x19
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; CHECK-NEXT: mov x4, xzr
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; CHECK-NEXT: orr x0, x8, #0x2
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; CHECK-NEXT: bl __stdio_common_vsprintf
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: csinv w0, w0, wzr, ge
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; CHECK-NEXT: .seh_startepilogue
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; CHECK-NEXT: ldp x21, x30, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: .seh_save_lrpair x21, 32
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; CHECK-NEXT: ldp x19, x20, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: .seh_save_regp x19, 16
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; CHECK-NEXT: add sp, sp, #96
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; CHECK-NEXT: .seh_stackalloc 96
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; CHECK-NEXT: .seh_endepilogue
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; CHECK-NEXT: ret
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; CHECK-NEXT: .seh_endfunclet
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; CHECK-NEXT: .seh_endproc
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%4 = alloca ptr, align 8
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call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #2
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call void @llvm.va_start(ptr nonnull %4)
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%5 = load ptr, ptr %4, align 8
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%6 = call ptr @__local_stdio_printf_options() #2
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%7 = load i64, ptr %6, align 8
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%8 = or i64 %7, 2
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%9 = call i32 @__stdio_common_vsprintf(i64 %8, ptr %0, i64 %1, ptr %2, ptr null, ptr %5) #2
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%10 = icmp sgt i32 %9, -1
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%11 = select i1 %10, i32 %9, i32 -1
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call void @llvm.va_end(ptr nonnull %4)
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call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #2
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ret i32 %11
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}
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define void @fixed_params(i32, double, i32, double, i32, double, i32, double, i32, double) nounwind {
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; CHECK-LABEL: fixed_params:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sub sp, sp, #32
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; CHECK-NEXT: mov w8, w4
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; CHECK-NEXT: mov w6, w3
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; CHECK-NEXT: mov w4, w2
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; CHECK-NEXT: mov w2, w1
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; CHECK-NEXT: fmov x1, d0
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; CHECK-NEXT: fmov x3, d1
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; CHECK-NEXT: fmov x5, d2
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; CHECK-NEXT: fmov x7, d3
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; CHECK-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
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; CHECK-NEXT: str d4, [sp, #8]
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; CHECK-NEXT: str w8, [sp]
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; CHECK-NEXT: bl varargs
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; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
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; CHECK-NEXT: add sp, sp, #32
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; CHECK-NEXT: ret
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tail call void (i32, ...) @varargs(i32 %0, double %1, i32 %2, double %3, i32 %4, double %5, i32 %6, double %7, i32 %8, double %9)
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ret void
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}
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declare void @varargs(i32, ...) local_unnamed_addr
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