49510c5020
All instructions that can raise fp exceptions also read FPCR, with the only other instructions that interact with it being the MSR/MRS to write/read FPCR. Introducing an FPCR register also requires adjusting invalidateWindowsRegisterPairing in AArch64FrameLowering.cpp to use the encoded value of registers instead of their enum value, as the enum value is based on the alphabetical order of register names and now FPCR is placed between FP and LR. This change unfortunately means a large number of mir tests need to be adjusted due to instructions now requiring an implicit fpcr operand to be present. Differential Revision: https://reviews.llvm.org/D121929
156 lines
8.2 KiB
YAML
156 lines
8.2 KiB
YAML
# RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog \
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# RUN: -filetype=obj | llvm-readobj --unwind - | FileCheck %s
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# Test that the register pairing of both general purpose and floating point
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# registers is correctly saved in the .xdata section, as well as the pre/post
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# increment of floating point register pairs.
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# CHECK: ExceptionData {
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# CHECK-NEXT: FunctionLength: 124
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# CHECK-NEXT: Version: 0
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# CHECK-NEXT: ExceptionData: No
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# CHECK-NEXT: EpiloguePacked: Yes
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# CHECK-NEXT: EpilogueOffset: 0
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# CHECK-NEXT: ByteCodeLength: 16
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# CHECK-NEXT: Prologue [
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# CHECK-NEXT: 0xc80c ; stp x19, x20, [sp, #96]
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# CHECK-NEXT: 0xc88a ; stp x21, x22, [sp, #80]
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# CHECK-NEXT: 0xc908 ; stp x23, x24, [sp, #64]
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# CHECK-NEXT: 0xc986 ; stp x25, x26, [sp, #48]
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# CHECK-NEXT: 0xca04 ; stp x27, x28, [sp, #32]
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# CHECK-NEXT: 0xd802 ; stp d8, d9, [sp, #16]
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# CHECK-NEXT: 0xda8d ; stp d10, d11, [sp, #-112]!
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# CHECK-NEXT: 0xe4 ; end
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# CHECK-NEXT: ]
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# CHECK-NEXT: }
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...
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---
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name: test
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: true
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registers:
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liveins:
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- { reg: '$w0', virtual-reg: '' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 112
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offsetAdjustment: 0
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maxAlignment: 8
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: true
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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localFrameSize: 0
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savePoint: ''
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restorePoint: ''
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fixedStack:
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stack:
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- { id: 0, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$x19', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$x20', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 2, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$x21', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 3, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$x22', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 4, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$x23', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 5, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$x24', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 6, name: '', type: spill-slot, offset: -56, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$x25', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 7, name: '', type: spill-slot, offset: -64, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$x26', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 8, name: '', type: spill-slot, offset: -72, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$x27', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 9, name: '', type: spill-slot, offset: -80, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$x28', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 10, name: '', type: spill-slot, offset: -88, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$d8', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 11, name: '', type: spill-slot, offset: -96, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$d9', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 12, name: '', type: spill-slot, offset: -104, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$d10', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 13, name: '', type: spill-slot, offset: -112, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '$d11', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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constants:
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body: |
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bb.0.entry:
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liveins: $x0, $x1, $d0, $d1, $d10, $d11, $d8, $d9, $x27, $x28, $x25, $x26, $x23, $x24, $x21, $x22, $x19, $x20
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early-clobber $sp = frame-setup STPDpre killed $d10, killed $d11, $sp, -14 :: (store (s64) into %stack.12), (store (s64) into %stack.13)
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frame-setup SEH_SaveFRegP_X 10, 11, -112
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frame-setup STPDi killed $d8, killed $d9, $sp, 2 :: (store (s64) into %stack.10), (store (s64) into %stack.11)
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frame-setup SEH_SaveFRegP 8, 9, 16
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frame-setup STPXi killed $x27, killed $x28, $sp, 4 :: (store (s64) into %stack.8), (store (s64) into %stack.9)
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frame-setup SEH_SaveRegP 27, 28, 32
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frame-setup STPXi killed $x25, killed $x26, $sp, 6 :: (store (s64) into %stack.6), (store (s64) into %stack.7)
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frame-setup SEH_SaveRegP 25, 26, 48
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frame-setup STPXi killed $x23, killed $x24, $sp, 8 :: (store (s64) into %stack.4), (store (s64) into %stack.5)
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frame-setup SEH_SaveRegP 23, 24, 64
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frame-setup STPXi killed $x21, killed $x22, $sp, 10 :: (store (s64) into %stack.2), (store (s64) into %stack.3)
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frame-setup SEH_SaveRegP 21, 22, 80
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frame-setup STPXi killed $x19, killed $x20, $sp, 12 :: (store (s64) into %stack.0), (store (s64) into %stack.1)
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frame-setup SEH_SaveRegP 19, 20, 96
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frame-setup SEH_PrologEnd
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$x19 = ADDXrr $x0, killed $x1
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$d8 = FADDDrr killed $d0, $d1, implicit $fpcr
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$d9 = FADDDrr $d8, $d1, implicit $fpcr
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$d10 = FADDDrr $d9, $d8, implicit $fpcr
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$d11 = FADDDrr killed $d9, $d10, implicit $fpcr
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$x20 = ADDXrr $x19, killed $x0
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$x21 = ADDXrr $x20, killed $x19
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$x22 = ADDXrr $x21, killed $x20
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$x23 = ADDXrr $x22, killed $x21
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$x24 = ADDXrr $x23, killed $x22
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$x25 = ADDXrr $x24, killed $x23
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$x26 = ADDXrr $x25, killed $x24
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$x27 = ADDXrr $x26, killed $x25
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$x28 = ADDXrr $x27, killed $x26
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$x0 = COPY $d11
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$x0 = ADDXrr $x0, killed $x28
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frame-destroy SEH_EpilogStart
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$x19, $x20 = frame-destroy LDPXi $sp, 12 :: (load (s64) from %stack.0), (load (s64) from %stack.1)
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frame-destroy SEH_SaveRegP 19, 20, 96
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$x21, $x22 = frame-destroy LDPXi $sp, 10 :: (load (s64) from %stack.2), (load (s64) from %stack.3)
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frame-destroy SEH_SaveRegP 21, 22, 80
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$x23, $x24 = frame-destroy LDPXi $sp, 8 :: (load (s64) from %stack.4), (load (s64) from %stack.5)
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frame-destroy SEH_SaveRegP 23, 24, 64
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$x25, $x26 = frame-destroy LDPXi $sp, 6 :: (load (s64) from %stack.6), (load (s64) from %stack.7)
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frame-destroy SEH_SaveRegP 25, 26, 48
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$x27, $x28 = frame-destroy LDPXi $sp, 4 :: (load (s64) from %stack.8), (load (s64) from %stack.9)
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frame-destroy SEH_SaveRegP 27, 28, 32
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$d8, $d9 = frame-destroy LDPDi $sp, 2 :: (load (s64) from %stack.10), (load (s64) from %stack.11)
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frame-destroy SEH_SaveFRegP 8, 9, 16
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early-clobber $sp, $d10, $d11 = frame-destroy LDPDpost $sp, 14 :: (load (s64) from %stack.12), (load (s64) from %stack.13)
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frame-destroy SEH_SaveFRegP_X 10, 11, -112
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frame-destroy SEH_EpilogEnd
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RET_ReallyLR implicit $x0
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...
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