b6b703b2df
SIMachineFunctionInfo has a scan of the function body for inline asm
which may use AGPRs, or callees in SIMachineFunctionInfo. Move this
into the attributor, so it actually works interprocedurally.
Could probably avoid most of the test churn if this bothered to avoid
adding this on subtargets without AGPRs. We should also probably
try to delete the MIR scan in usesAGPRs but it seems to be trickier
to eliminate.
256 lines
10 KiB
LLVM
256 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-attributes --check-globals all --version 4
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; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -passes=amdgpu-attributor %s | FileCheck %s
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define amdgpu_kernel void @kernel_uses_asm_virtreg() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg(
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; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: call void asm sideeffect "
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; CHECK-NEXT: ret void
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;
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call void asm sideeffect "; use $0", "a"(i32 poison)
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ret void
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}
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define amdgpu_kernel void @kernel_uses_asm_virtreg_def() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_def(
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; CHECK-SAME: ) #[[ATTR0]] {
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; CHECK-NEXT: [[DEF:%.*]] = call i32 asm sideeffect "
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; CHECK-NEXT: ret void
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;
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%def = call i32 asm sideeffect "; def $0", "=a"()
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ret void
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}
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define amdgpu_kernel void @kernel_uses_asm_physreg_def_tuple() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_physreg_def_tuple(
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; CHECK-SAME: ) #[[ATTR0]] {
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; CHECK-NEXT: [[DEF:%.*]] = call i64 asm sideeffect "
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; CHECK-NEXT: ret void
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;
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%def = call i64 asm sideeffect "; def $0", "={a[0:1]}"()
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ret void
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}
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define amdgpu_kernel void @kernel_uses_asm_virtreg_second_arg() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_virtreg_second_arg(
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; CHECK-SAME: ) #[[ATTR0]] {
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; CHECK-NEXT: call void asm sideeffect "
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; CHECK-NEXT: ret void
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;
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call void asm sideeffect "; use $0", "v,a"(i32 poison, i32 poison)
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ret void
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}
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define amdgpu_kernel void @kernel_uses_non_agpr_asm() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_non_agpr_asm(
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; CHECK-SAME: ) #[[ATTR1:[0-9]+]] {
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; CHECK-NEXT: call void asm sideeffect "
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; CHECK-NEXT: ret void
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;
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call void asm sideeffect "; use $0", "v"(i32 poison)
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ret void
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}
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define amdgpu_kernel void @kernel_uses_asm_physreg() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_physreg(
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; CHECK-SAME: ) #[[ATTR0]] {
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; CHECK-NEXT: call void asm sideeffect "
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; CHECK-NEXT: ret void
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;
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call void asm sideeffect "; use $0", "{a0}"(i32 poison)
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ret void
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}
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define amdgpu_kernel void @kernel_uses_asm_physreg_tuple() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_uses_asm_physreg_tuple(
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; CHECK-SAME: ) #[[ATTR0]] {
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; CHECK-NEXT: call void asm sideeffect "
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; CHECK-NEXT: ret void
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;
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call void asm sideeffect "; use $0", "{a[0:1]}"(i64 poison)
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ret void
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}
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define void @func_uses_asm_virtreg_agpr() {
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; CHECK-LABEL: define void @func_uses_asm_virtreg_agpr(
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; CHECK-SAME: ) #[[ATTR2:[0-9]+]] {
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; CHECK-NEXT: call void asm sideeffect "
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; CHECK-NEXT: ret void
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;
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call void asm sideeffect "; use $0", "a"(i32 poison)
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ret void
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}
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define void @func_uses_asm_physreg_agpr() {
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; CHECK-LABEL: define void @func_uses_asm_physreg_agpr(
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; CHECK-SAME: ) #[[ATTR2]] {
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; CHECK-NEXT: call void asm sideeffect "
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; CHECK-NEXT: ret void
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;
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call void asm sideeffect "; use $0", "{a0}"(i32 poison)
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ret void
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}
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define void @func_uses_asm_physreg_agpr_tuple() {
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; CHECK-LABEL: define void @func_uses_asm_physreg_agpr_tuple(
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; CHECK-SAME: ) #[[ATTR2]] {
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; CHECK-NEXT: call void asm sideeffect "
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; CHECK-NEXT: ret void
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;
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call void asm sideeffect "; use $0", "{a[0:1]}"(i64 poison)
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ret void
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}
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declare void @unknown()
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define amdgpu_kernel void @kernel_calls_extern() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_extern(
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; CHECK-SAME: ) #[[ATTR4:[0-9]+]] {
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; CHECK-NEXT: call void @unknown()
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; CHECK-NEXT: ret void
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;
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call void @unknown()
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ret void
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}
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define amdgpu_kernel void @kernel_calls_extern_marked_callsite() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_extern_marked_callsite(
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; CHECK-SAME: ) #[[ATTR4]] {
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; CHECK-NEXT: call void @unknown() #[[ATTR9:[0-9]+]]
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; CHECK-NEXT: ret void
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;
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call void @unknown() #0
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ret void
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}
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define amdgpu_kernel void @kernel_calls_indirect(ptr %indirect) {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_indirect(
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; CHECK-SAME: ptr [[INDIRECT:%.*]]) #[[ATTR4]] {
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; CHECK-NEXT: call void [[INDIRECT]]()
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; CHECK-NEXT: ret void
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;
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call void %indirect()
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ret void
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}
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define amdgpu_kernel void @kernel_calls_indirect_marked_callsite(ptr %indirect) {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_indirect_marked_callsite(
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; CHECK-SAME: ptr [[INDIRECT:%.*]]) #[[ATTR4]] {
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; CHECK-NEXT: call void [[INDIRECT]]() #[[ATTR9]]
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; CHECK-NEXT: ret void
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;
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call void %indirect() #0
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ret void
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}
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define amdgpu_kernel void @kernel_transitively_uses_agpr_asm() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_transitively_uses_agpr_asm(
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; CHECK-SAME: ) #[[ATTR0]] {
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; CHECK-NEXT: call void @func_uses_asm_physreg_agpr()
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; CHECK-NEXT: ret void
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;
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call void @func_uses_asm_physreg_agpr()
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ret void
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}
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define void @empty() {
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; CHECK-LABEL: define void @empty(
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; CHECK-SAME: ) #[[ATTR5:[0-9]+]] {
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; CHECK-NEXT: ret void
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;
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ret void
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}
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define void @also_empty() {
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; CHECK-LABEL: define void @also_empty(
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; CHECK-SAME: ) #[[ATTR5]] {
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; CHECK-NEXT: ret void
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;
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ret void
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}
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define amdgpu_kernel void @kernel_calls_empty() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_empty(
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; CHECK-SAME: ) #[[ATTR1]] {
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; CHECK-NEXT: call void @empty()
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; CHECK-NEXT: ret void
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;
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call void @empty()
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ret void
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}
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define amdgpu_kernel void @kernel_calls_non_agpr_and_agpr() {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_non_agpr_and_agpr(
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; CHECK-SAME: ) #[[ATTR0]] {
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; CHECK-NEXT: call void @empty()
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; CHECK-NEXT: call void @func_uses_asm_physreg_agpr()
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; CHECK-NEXT: ret void
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;
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call void @empty()
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call void @func_uses_asm_physreg_agpr()
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ret void
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}
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define amdgpu_kernel void @kernel_calls_generic_intrinsic(ptr %ptr0, ptr %ptr1, i64 %size) {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_generic_intrinsic(
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; CHECK-SAME: ptr [[PTR0:%.*]], ptr [[PTR1:%.*]], i64 [[SIZE:%.*]]) #[[ATTR1]] {
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; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr [[PTR0]], ptr [[PTR1]], i64 [[SIZE]], i1 false)
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; CHECK-NEXT: ret void
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;
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call void @llvm.memcpy.p0.p0.i64(ptr %ptr0, ptr %ptr1, i64 %size, i1 false)
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ret void
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}
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declare <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float, float, <32 x float>, i32 immarg, i32 immarg, i32 immarg)
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define amdgpu_kernel void @kernel_calls_mfma.f32.32x32x1f32(ptr addrspace(1) %out, float %a, float %b, <32 x float> %c) {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_mfma.f32.32x32x1f32(
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; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], float [[A:%.*]], float [[B:%.*]], <32 x float> [[C:%.*]]) #[[ATTR1]] {
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; CHECK-NEXT: [[RESULT:%.*]] = call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float [[A]], float [[B]], <32 x float> [[C]], i32 0, i32 0, i32 0)
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; CHECK-NEXT: store <32 x float> [[RESULT]], ptr addrspace(1) [[OUT]], align 128
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; CHECK-NEXT: ret void
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;
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%result = call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float %a, float %b, <32 x float> %c, i32 0, i32 0, i32 0)
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store <32 x float> %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_kernel void @kernel_calls_workitem_id_x(ptr addrspace(1) %out) {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_workitem_id_x(
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; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR1]] {
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; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
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; CHECK-NEXT: store i32 [[RESULT]], ptr addrspace(1) [[OUT]], align 4
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; CHECK-NEXT: ret void
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;
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%result = call i32 @llvm.amdgcn.workitem.id.x()
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_kernel void @indirect_calls_none_agpr(i1 %cond) {
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; CHECK-LABEL: define amdgpu_kernel void @indirect_calls_none_agpr(
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; CHECK-SAME: i1 [[COND:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[FPTR:%.*]] = select i1 [[COND]], ptr @empty, ptr @also_empty
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; CHECK-NEXT: call void [[FPTR]]()
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; CHECK-NEXT: ret void
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;
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%fptr = select i1 %cond, ptr @empty, ptr @also_empty
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call void %fptr()
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ret void
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}
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attributes #0 = { "amdgpu-no-agpr" }
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;.
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; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
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; CHECK: attributes #[[ATTR1]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
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; CHECK: attributes #[[ATTR2]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,8" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
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; CHECK: attributes #[[ATTR3:[0-9]+]] = { "amdgpu-waves-per-eu"="4,8" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
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; CHECK: attributes #[[ATTR4]] = { "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
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; CHECK: attributes #[[ATTR5]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,8" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
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; CHECK: attributes #[[ATTR6:[0-9]+]] = { convergent nocallback nofree nosync nounwind willreturn memory(none) "target-cpu"="gfx90a" }
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; CHECK: attributes #[[ATTR7:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) "target-cpu"="gfx90a" }
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; CHECK: attributes #[[ATTR8:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) "target-cpu"="gfx90a" }
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; CHECK: attributes #[[ATTR9]] = { "amdgpu-no-agpr" }
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;.
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