9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
50 lines
1.5 KiB
LLVM
50 lines
1.5 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=tahiti -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; SI-LABEL: {{^}}s_or_to_orn2:
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; SI: s_orn2_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
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define amdgpu_kernel void @s_or_to_orn2(ptr addrspace(1) %out, i32 %in) {
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%x = or i32 %in, -51
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store i32 %x, ptr addrspace(1) %out
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ret void
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}
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; SI-LABEL: {{^}}s_or_to_orn2_imm0:
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; SI: s_orn2_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
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define amdgpu_kernel void @s_or_to_orn2_imm0(ptr addrspace(1) %out, i32 %in) {
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%x = or i32 -51, %in
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store i32 %x, ptr addrspace(1) %out
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ret void
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}
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; SI-LABEL: {{^}}s_and_to_andn2:
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; SI: s_andn2_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
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define amdgpu_kernel void @s_and_to_andn2(ptr addrspace(1) %out, i32 %in) {
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%x = and i32 %in, -51
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store i32 %x, ptr addrspace(1) %out
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ret void
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}
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; SI-LABEL: {{^}}s_and_to_andn2_imm0:
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; SI: s_andn2_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
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define amdgpu_kernel void @s_and_to_andn2_imm0(ptr addrspace(1) %out, i32 %in) {
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%x = and i32 -51, %in
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store i32 %x, ptr addrspace(1) %out
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ret void
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}
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; SI-LABEL: {{^}}s_xor_to_xnor:
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; SI: s_xnor_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
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define amdgpu_kernel void @s_xor_to_xnor(ptr addrspace(1) %out, i32 %in) {
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%x = xor i32 %in, -51
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store i32 %x, ptr addrspace(1) %out
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ret void
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}
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; SI-LABEL: {{^}}s_xor_to_xnor_imm0:
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; SI: s_xnor_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
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define amdgpu_kernel void @s_xor_to_xnor_imm0(ptr addrspace(1) %out, i32 %in) {
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%x = xor i32 -51, %in
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store i32 %x, ptr addrspace(1) %out
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ret void
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}
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