9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
55 lines
2.2 KiB
LLVM
55 lines
2.2 KiB
LLVM
; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -mtriple=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}any_extend_vector_inreg_v16i8_to_v4i32:
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; GCN: s_load_dwordx8
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; GCN-DAG: s_load_dword
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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; GCN: {{buffer|flat}}_store_byte
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define amdgpu_kernel void @any_extend_vector_inreg_v16i8_to_v4i32(ptr addrspace(1) nocapture readonly %arg, ptr addrspace(1) %arg1) local_unnamed_addr #0 {
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bb:
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%tmp2 = load <16 x i8>, ptr addrspace(1) %arg, align 16
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%tmp3 = extractelement <16 x i8> %tmp2, i64 4
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%tmp6 = extractelement <16 x i8> %tmp2, i64 11
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%tmp10 = getelementptr inbounds <8 x i8>, ptr addrspace(1) %arg, i64 2
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%tmp12 = load <16 x i8>, ptr addrspace(1) %tmp10, align 16
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%tmp13 = extractelement <16 x i8> %tmp12, i64 7
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%tmp17 = extractelement <16 x i8> %tmp12, i64 12
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%tmp21 = getelementptr inbounds <8 x i8>, ptr addrspace(1) %arg, i64 4
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%tmp23 = load <16 x i8>, ptr addrspace(1) %tmp21, align 16
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%tmp24 = extractelement <16 x i8> %tmp23, i64 3
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%tmp1 = insertelement <16 x i8> undef, i8 %tmp3, i32 2
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%tmp4 = insertelement <16 x i8> %tmp1, i8 0, i32 3
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%tmp5 = insertelement <16 x i8> %tmp4, i8 0, i32 4
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%tmp7 = insertelement <16 x i8> %tmp5, i8 %tmp6, i32 5
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%tmp8 = insertelement <16 x i8> %tmp7, i8 0, i32 6
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%tmp9 = insertelement <16 x i8> %tmp8, i8 %tmp13, i32 7
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%tmp14 = insertelement <16 x i8> %tmp9, i8 0, i32 8
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%tmp15 = insertelement <16 x i8> %tmp14, i8 %tmp17, i32 9
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%tmp16 = insertelement <16 x i8> %tmp15, i8 0, i32 10
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%tmp18 = insertelement <16 x i8> %tmp16, i8 0, i32 11
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%tmp19 = insertelement <16 x i8> %tmp18, i8 %tmp24, i32 12
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store <16 x i8> %tmp19, ptr addrspace(1) %arg1, align 1
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ret void
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}
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attributes #0 = { nounwind }
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