9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
40 lines
1.8 KiB
LLVM
40 lines
1.8 KiB
LLVM
; RUN: llc -mtriple=r600 -mtriple=r600-- -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
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;
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; kernel void combine_vloads(global char8 addrspace(5)* src, global char8 addrspace(5)* result) {
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; for (int i = 0; i < 1024; ++i)
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; result[i] = src[0] + src[1] + src[2] + src[3];
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; }
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;
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; 128-bit loads instead of many 8-bit
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; EG-LABEL: {{^}}combine_vloads:
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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define amdgpu_kernel void @combine_vloads(ptr addrspace(1) nocapture %src, ptr addrspace(1) nocapture %result) nounwind {
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entry:
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br label %for.body
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for.exit: ; preds = %for.body
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ret void
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for.body: ; preds = %for.body, %entry
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%i.01 = phi i32 [ 0, %entry ], [ %tmp19, %for.body ]
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%vecload2 = load <8 x i32>, ptr addrspace(1) %src, align 32
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%0 = bitcast <8 x i32> %vecload2 to <32 x i8>
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%tmp5 = shufflevector <32 x i8> %0, <32 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%tmp8 = shufflevector <32 x i8> %0, <32 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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%tmp9 = add nsw <8 x i8> %tmp5, %tmp8
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%tmp12 = shufflevector <32 x i8> %0, <32 x i8> undef, <8 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
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%tmp13 = add nsw <8 x i8> %tmp9, %tmp12
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%tmp16 = shufflevector <32 x i8> %0, <32 x i8> undef, <8 x i32> <i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
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%tmp17 = add nsw <8 x i8> %tmp13, %tmp16
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%scevgep = getelementptr <8 x i8>, ptr addrspace(1) %result, i32 %i.01
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%1 = bitcast <8 x i8> %tmp17 to <2 x i32>
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store <2 x i32> %1, ptr addrspace(1) %scevgep, align 8
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%tmp19 = add nsw i32 %i.01, 1
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%exitcond = icmp eq i32 %tmp19, 1024
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br i1 %exitcond, label %for.exit, label %for.body
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}
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