9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
45 lines
1.2 KiB
LLVM
45 lines
1.2 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 - < %s | FileCheck %s
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@local = addrspace(3) global i32 undef
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define amdgpu_kernel void @reducible() {
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; CHECK-LABEL: reducible:
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; CHECK-NOT: dpp
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entry:
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%x = call i32 @llvm.amdgcn.workitem.id.x()
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i1, %loop ]
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%gep = getelementptr i32, ptr addrspace(3) @local, i32 %i
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%cond = icmp ult i32 %i, %x
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%i1 = add i32 %i, 1
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br i1 %cond, label %loop, label %exit
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exit:
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%old = atomicrmw add ptr addrspace(3) %gep, i32 %x acq_rel
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ret void
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}
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define amdgpu_kernel void @def_in_nested_cycle() {
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; CHECK-LABEL: def_in_nested_cycle:
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; CHECK-NOT: dpp
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entry:
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%x = call i32 @llvm.amdgcn.workitem.id.x()
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ 0, %innerloop ], [ %i1, %loop ]
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%cond = icmp ult i32 %i, %x
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%i1 = add i32 %i, 1
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br i1 %cond, label %innerloop, label %loop
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innerloop:
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%i.inner = phi i32 [ 0, %loop ], [ %i1.inner, %innerloop ]
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%gep = getelementptr i32, ptr addrspace(3) @local, i32 %i
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%i1.inner = add i32 %i, 1
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%cond.inner = icmp ult i32 %i, %x
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br i1 %cond, label %innerloop, label %loop
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exit:
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%old = atomicrmw add ptr addrspace(3) %gep, i32 %x acq_rel
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x()
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