9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
31 lines
1.2 KiB
LLVM
31 lines
1.2 KiB
LLVM
; RUN: llc -mtriple=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
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declare float @llvm.copysign.f32(float, float) nounwind readnone
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declare <2 x float> @llvm.copysign.v2f32(<2 x float>, <2 x float>) nounwind readnone
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declare <4 x float> @llvm.copysign.v4f32(<4 x float>, <4 x float>) nounwind readnone
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; EG: BFI_INT
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define amdgpu_kernel void @test_copysign_f32(ptr addrspace(1) %out, float %mag, float %sign) nounwind {
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%result = call float @llvm.copysign.f32(float %mag, float %sign)
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store float %result, ptr addrspace(1) %out, align 4
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ret void
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}
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; EG: BFI_INT
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; EG: BFI_INT
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define amdgpu_kernel void @test_copysign_v2f32(ptr addrspace(1) %out, <2 x float> %mag, <2 x float> %sign) nounwind {
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%result = call <2 x float> @llvm.copysign.v2f32(<2 x float> %mag, <2 x float> %sign)
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store <2 x float> %result, ptr addrspace(1) %out, align 8
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ret void
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}
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; EG: BFI_INT
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; EG: BFI_INT
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; EG: BFI_INT
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; EG: BFI_INT
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define amdgpu_kernel void @test_copysign_v4f32(ptr addrspace(1) %out, <4 x float> %mag, <4 x float> %sign) nounwind {
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%result = call <4 x float> @llvm.copysign.v4f32(<4 x float> %mag, <4 x float> %sign)
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store <4 x float> %result, ptr addrspace(1) %out, align 16
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ret void
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}
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