9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
129 lines
4.3 KiB
LLVM
129 lines
4.3 KiB
LLVM
; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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declare double @llvm.fabs.f64(double %Val)
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declare double @llvm.floor.f64(double) nounwind readnone
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declare <2 x double> @llvm.floor.v2f64(<2 x double>) nounwind readnone
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declare <3 x double> @llvm.floor.v3f64(<3 x double>) nounwind readnone
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declare <4 x double> @llvm.floor.v4f64(<4 x double>) nounwind readnone
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declare <8 x double> @llvm.floor.v8f64(<8 x double>) nounwind readnone
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declare <16 x double> @llvm.floor.v16f64(<16 x double>) nounwind readnone
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; FUNC-LABEL: {{^}}ffloor_f64:
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; CI: v_floor_f64_e32
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; SI: v_fract_f64_e32
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; SI-DAG: v_min_f64
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; SI-DAG: v_cmp_class_f64_e64 vcc
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; SI: v_cndmask_b32_e32
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; SI: v_cndmask_b32_e32
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; SI: v_add_f64
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; SI: s_endpgm
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define amdgpu_kernel void @ffloor_f64(ptr addrspace(1) %out, double %x) {
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%y = call fast double @llvm.floor.f64(double %x) nounwind readnone
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store double %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ffloor_f64_neg:
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; CI: v_floor_f64_e64
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; SI: v_fract_f64_e64 {{v\[[0-9]+:[0-9]+\]}}, -[[INPUT:s\[[0-9]+:[0-9]+\]]]
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; SI-DAG: v_min_f64
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; SI-DAG: v_cmp_class_f64_e64 vcc
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; SI: v_cndmask_b32_e32
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; SI: v_cndmask_b32_e32
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; SI: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, -[[INPUT]]
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; SI: s_endpgm
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define amdgpu_kernel void @ffloor_f64_neg(ptr addrspace(1) %out, double %x) {
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%neg = fsub nsz double 0.0, %x
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%y = call fast double @llvm.floor.f64(double %neg) nounwind readnone
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store double %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ffloor_f64_neg_abs:
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; CI: v_floor_f64_e64
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; SI: v_fract_f64_e64 {{v\[[0-9]+:[0-9]+\]}}, -|[[INPUT:s\[[0-9]+:[0-9]+\]]]|
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; SI-DAG: v_min_f64
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; SI-DAG: v_cmp_class_f64_e64 vcc
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; SI: v_cndmask_b32_e32
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; SI: v_cndmask_b32_e32
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; SI: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, -|[[INPUT]]|
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; SI: s_endpgm
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define amdgpu_kernel void @ffloor_f64_neg_abs(ptr addrspace(1) %out, double %x) {
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%abs = call fast double @llvm.fabs.f64(double %x)
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%neg = fsub nsz double 0.0, %abs
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%y = call fast double @llvm.floor.f64(double %neg) nounwind readnone
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store double %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ffloor_v2f64:
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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define amdgpu_kernel void @ffloor_v2f64(ptr addrspace(1) %out, <2 x double> %x) {
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%y = call fast <2 x double> @llvm.floor.v2f64(<2 x double> %x) nounwind readnone
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store <2 x double> %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ffloor_v3f64:
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI-NOT: v_floor_f64_e32
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define amdgpu_kernel void @ffloor_v3f64(ptr addrspace(1) %out, <3 x double> %x) {
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%y = call fast <3 x double> @llvm.floor.v3f64(<3 x double> %x) nounwind readnone
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store <3 x double> %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ffloor_v4f64:
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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define amdgpu_kernel void @ffloor_v4f64(ptr addrspace(1) %out, <4 x double> %x) {
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%y = call fast <4 x double> @llvm.floor.v4f64(<4 x double> %x) nounwind readnone
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store <4 x double> %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ffloor_v8f64:
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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define amdgpu_kernel void @ffloor_v8f64(ptr addrspace(1) %out, <8 x double> %x) {
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%y = call fast <8 x double> @llvm.floor.v8f64(<8 x double> %x) nounwind readnone
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store <8 x double> %y, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}ffloor_v16f64:
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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define amdgpu_kernel void @ffloor_v16f64(ptr addrspace(1) %out, <16 x double> %x) {
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%y = call fast <16 x double> @llvm.floor.v16f64(<16 x double> %x) nounwind readnone
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store <16 x double> %y, ptr addrspace(1) %out
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ret void
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}
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