2db700215a
Adds an intrinsic/builtin that can be used to fine tune scheduler behavior. If there is a need to have highly optimized codegen and kernel developers have knowledge of inter-wave runtime behavior which is unknown to the compiler this builtin can be used to tune scheduling. This intrinsic creates a barrier between scheduling regions. The immediate parameter is a mask to determine the types of instructions that should be prevented from crossing the sched_barrier. In this initial patch, there are only two variations. A mask of 0 means that no instructions may be scheduled across the sched_barrier. A mask of 1 means that non-memory, non-side-effect inducing instructions may cross the sched_barrier. Note that this intrinsic is only meant to work with the scheduling passes. Any other transformations that may move code will not be impacted in the ways described above. Reviewed By: rampitec Differential Revision: https://reviews.llvm.org/D124700
83 lines
2.5 KiB
YAML
83 lines
2.5 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN %s
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# WAVE_BARRIER and SI_MASKED_UNREACHABLE ect. are not really instructions. To
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# fix the hazard (m0 def followed by V_INTERP), the compiler should insert a
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# S_NOP.
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---
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name: hazard_wave_barrier
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: hazard_wave_barrier
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; GCN: liveins: $sgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: $m0 = S_MOV_B32 killed renamable $sgpr0
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; GCN-NEXT: WAVE_BARRIER
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; GCN-NEXT: S_NOP 0
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; GCN-NEXT: renamable $vgpr0 = V_INTERP_MOV_F32 2, 0, 0, implicit $mode, implicit $m0, implicit $exec
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; GCN-NEXT: renamable $sgpr1 = S_MOV_B32 0
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; GCN-NEXT: S_ENDPGM 0
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$m0 = S_MOV_B32 killed renamable $sgpr0
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WAVE_BARRIER
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renamable $vgpr0 = V_INTERP_MOV_F32 2, 0, 0, implicit $mode, implicit $m0, implicit $exec
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renamable $sgpr1 = S_MOV_B32 0
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S_ENDPGM 0
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...
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---
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name: hazard-masked-unreachable
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tracksRegLiveness: true
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body: |
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; GCN-LABEL: name: hazard-masked-unreachable
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; GCN: bb.0:
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; GCN-NEXT: successors: %bb.1(0x80000000)
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; GCN-NEXT: liveins: $sgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: $m0 = S_MOV_B32 killed renamable $sgpr0
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; GCN-NEXT: SI_MASKED_UNREACHABLE
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; GCN-NEXT: S_NOP 0
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; GCN-NEXT: renamable $vgpr0 = V_INTERP_MOV_F32 2, 0, 0, implicit $mode, implicit $m0, implicit $exec
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; GCN-NEXT: renamable $sgpr1 = S_MOV_B32 0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.1:
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; GCN-NEXT: S_ENDPGM 0
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bb.0:
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liveins: $sgpr0
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$m0 = S_MOV_B32 killed renamable $sgpr0
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SI_MASKED_UNREACHABLE
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renamable $vgpr0 = V_INTERP_MOV_F32 2, 0, 0, implicit $mode, implicit $m0, implicit $exec
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renamable $sgpr1 = S_MOV_B32 0
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bb.1:
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S_ENDPGM 0
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...
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---
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name: hazard_sched_barrier
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: hazard_sched_barrier
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; GCN: liveins: $sgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: $m0 = S_MOV_B32 killed renamable $sgpr0
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; GCN-NEXT: SCHED_BARRIER 0
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; GCN-NEXT: S_NOP 0
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; GCN-NEXT: renamable $vgpr0 = V_INTERP_MOV_F32 2, 0, 0, implicit $mode, implicit $m0, implicit $exec
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; GCN-NEXT: renamable $sgpr1 = S_MOV_B32 0
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; GCN-NEXT: S_ENDPGM 0
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$m0 = S_MOV_B32 killed renamable $sgpr0
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SCHED_BARRIER 0
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renamable $vgpr0 = V_INTERP_MOV_F32 2, 0, 0, implicit $mode, implicit $m0, implicit $exec
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renamable $sgpr1 = S_MOV_B32 0
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S_ENDPGM 0
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...
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