9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
354 lines
14 KiB
LLVM
354 lines
14 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s| FileCheck -check-prefix=GCN -check-prefix=SI %s
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;;;==========================================================================;;;
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;; 16-bit integer comparisons
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;;;==========================================================================;;;
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; GCN-LABEL: {{^}}i16_eq:
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; VI: v_cmp_eq_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_eq_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_eq(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%b = load i16, ptr addrspace(1) %b.gep
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%tmp0 = icmp eq i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_ne:
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; VI: v_cmp_ne_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_ne_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_ne(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%b = load i16, ptr addrspace(1) %b.gep
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%tmp0 = icmp ne i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_ugt:
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; VI: v_cmp_gt_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_gt_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_ugt(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%b = load i16, ptr addrspace(1) %b.gep
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%tmp0 = icmp ugt i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_uge:
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; VI: v_cmp_ge_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_ge_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_uge(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%b = load i16, ptr addrspace(1) %b.gep
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%tmp0 = icmp uge i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_ult:
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; VI: v_cmp_lt_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_lt_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_ult(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%b = load i16, ptr addrspace(1) %b.gep
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%tmp0 = icmp ult i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_ule:
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; VI: v_cmp_le_u16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_le_u32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_ule(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%b = load i16, ptr addrspace(1) %b.gep
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%tmp0 = icmp ule i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_sgt:
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; VI: v_cmp_gt_i16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_gt_i32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_sgt(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%b = load i16, ptr addrspace(1) %b.gep
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%tmp0 = icmp sgt i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_sge:
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; VI: v_cmp_ge_i16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_ge_i32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_sge(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%b = load i16, ptr addrspace(1) %b.gep
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%tmp0 = icmp sge i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_slt:
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; VI: v_cmp_lt_i16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_lt_i32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_slt(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%b = load i16, ptr addrspace(1) %b.gep
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%tmp0 = icmp slt i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_sle:
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; VI: v_cmp_le_i16_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_le_i32_e32 vcc, v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_sle(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%b = load i16, ptr addrspace(1) %b.gep
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%tmp0 = icmp sle i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; These should be commuted to reduce code size
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; GCN-LABEL: {{^}}i16_eq_v_s:
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; VI: v_cmp_eq_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_eq_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_eq_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%tmp0 = icmp eq i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_ne_v_s:
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; VI: v_cmp_ne_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_ne_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_ne_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%tmp0 = icmp ne i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_ugt_v_s:
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; VI: v_cmp_lt_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_lt_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_ugt_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%tmp0 = icmp ugt i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_uge_v_s:
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; VI: v_cmp_le_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_le_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_uge_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%tmp0 = icmp uge i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_ult_v_s:
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; VI: v_cmp_gt_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_gt_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_ult_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%tmp0 = icmp ult i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_ule_v_s:
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; VI: v_cmp_ge_u16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_ge_u32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_ule_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
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%tmp0 = icmp ule i16 %a, %b
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%tmp1 = sext i1 %tmp0 to i32
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store i32 %tmp1, ptr addrspace(1) %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}i16_sgt_v_s:
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; VI: v_cmp_lt_i16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_cmp_lt_i32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @i16_sgt_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
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%a = load i16, ptr addrspace(1) %a.gep
|
|
%tmp0 = icmp sgt i16 %a, %b
|
|
%tmp1 = sext i1 %tmp0 to i32
|
|
store i32 %tmp1, ptr addrspace(1) %out.gep
|
|
ret void
|
|
}
|
|
|
|
; GCN-LABEL: {{^}}i16_sge_v_s:
|
|
; VI: v_cmp_le_i16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
|
|
; SI: v_cmp_le_i32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
|
|
define amdgpu_kernel void @i16_sge_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
|
|
entry:
|
|
%tid = call i32 @llvm.amdgcn.workitem.id.x()
|
|
%tid.ext = sext i32 %tid to i64
|
|
%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
|
|
%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
|
|
%a = load i16, ptr addrspace(1) %a.gep
|
|
%tmp0 = icmp sge i16 %a, %b
|
|
%tmp1 = sext i1 %tmp0 to i32
|
|
store i32 %tmp1, ptr addrspace(1) %out.gep
|
|
ret void
|
|
}
|
|
|
|
; GCN-LABEL: {{^}}i16_slt_v_s:
|
|
; VI: v_cmp_gt_i16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
|
|
; SI: v_cmp_gt_i32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
|
|
define amdgpu_kernel void @i16_slt_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
|
|
entry:
|
|
%tid = call i32 @llvm.amdgcn.workitem.id.x()
|
|
%tid.ext = sext i32 %tid to i64
|
|
%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
|
|
%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
|
|
%a = load i16, ptr addrspace(1) %a.gep
|
|
%tmp0 = icmp slt i16 %a, %b
|
|
%tmp1 = sext i1 %tmp0 to i32
|
|
store i32 %tmp1, ptr addrspace(1) %out.gep
|
|
ret void
|
|
}
|
|
|
|
; GCN-LABEL: {{^}}i16_sle_v_s:
|
|
; VI: v_cmp_ge_i16_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
|
|
; SI: v_cmp_ge_i32_e32 vcc, s{{[0-9]+}}, v{{[0-9]+}}
|
|
define amdgpu_kernel void @i16_sle_v_s(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr, i16 %b) #0 {
|
|
entry:
|
|
%tid = call i32 @llvm.amdgcn.workitem.id.x()
|
|
%tid.ext = sext i32 %tid to i64
|
|
%a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr, i64 %tid.ext
|
|
%out.gep = getelementptr inbounds i32, ptr addrspace(1) %out, i64 %tid.ext
|
|
%a = load i16, ptr addrspace(1) %a.gep
|
|
%tmp0 = icmp sle i16 %a, %b
|
|
%tmp1 = sext i1 %tmp0 to i32
|
|
store i32 %tmp1, ptr addrspace(1) %out.gep
|
|
ret void
|
|
}
|
|
|
|
declare i32 @llvm.amdgcn.workitem.id.x() #1
|
|
|
|
attributes #0 = { nounwind }
|
|
attributes #1 = { nounwind readnone }
|