9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
96 lines
2.9 KiB
LLVM
96 lines
2.9 KiB
LLVM
; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SI %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI %s
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; GCN-LABEL: {{^}}test_i64_eq:
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; VI: s_cmp_eq_u64
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; SI: v_cmp_eq_u64
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define amdgpu_kernel void @test_i64_eq(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
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%cmp = icmp eq i64 %a, %b
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%result = sext i1 %cmp to i32
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store i32 %result, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_i64_ne:
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; VI: s_cmp_lg_u64
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; SI: v_cmp_ne_u64
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define amdgpu_kernel void @test_i64_ne(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
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%cmp = icmp ne i64 %a, %b
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%result = sext i1 %cmp to i32
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store i32 %result, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_i64_slt:
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; GCN: v_cmp_lt_i64
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define amdgpu_kernel void @test_i64_slt(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
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%cmp = icmp slt i64 %a, %b
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%result = sext i1 %cmp to i32
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store i32 %result, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_i64_ult:
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; GCN: v_cmp_lt_u64
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define amdgpu_kernel void @test_i64_ult(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
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%cmp = icmp ult i64 %a, %b
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%result = sext i1 %cmp to i32
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store i32 %result, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_i64_sle:
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; GCN: v_cmp_le_i64
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define amdgpu_kernel void @test_i64_sle(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
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%cmp = icmp sle i64 %a, %b
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%result = sext i1 %cmp to i32
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store i32 %result, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_i64_ule:
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; GCN: v_cmp_le_u64
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define amdgpu_kernel void @test_i64_ule(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
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%cmp = icmp ule i64 %a, %b
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%result = sext i1 %cmp to i32
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store i32 %result, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_i64_sgt:
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; GCN: v_cmp_gt_i64
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define amdgpu_kernel void @test_i64_sgt(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
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%cmp = icmp sgt i64 %a, %b
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%result = sext i1 %cmp to i32
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store i32 %result, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_i64_ugt:
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; GCN: v_cmp_gt_u64
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define amdgpu_kernel void @test_i64_ugt(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
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%cmp = icmp ugt i64 %a, %b
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%result = sext i1 %cmp to i32
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store i32 %result, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_i64_sge:
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; GCN: v_cmp_ge_i64
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define amdgpu_kernel void @test_i64_sge(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
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%cmp = icmp sge i64 %a, %b
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%result = sext i1 %cmp to i32
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store i32 %result, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_i64_uge:
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; GCN: v_cmp_ge_u64
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define amdgpu_kernel void @test_i64_uge(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
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%cmp = icmp uge i64 %a, %b
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%result = sext i1 %cmp to i32
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store i32 %result, ptr addrspace(1) %out, align 4
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ret void
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}
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