9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
47 lines
1.3 KiB
YAML
47 lines
1.3 KiB
YAML
# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass branch-folder -o - %s | FileCheck %s
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass branch-folder -o - %s | FileCheck %s
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# Designed to provoke calling SIInstrInfo::insertBranch in wave32 mode
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# The implicit $vcc operand should be $vcc_lo in this case
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...
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# CHECK-LABEL: bb.1:
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# CHECK: S_CBRANCH_VCCNZ %bb.1, implicit $vcc_lo
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name: _amdgpu_cs_main
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body: |
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bb.0:
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$vgpr1 = V_MOV_B32_e32 1050, implicit $exec
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$sgpr0 = S_MOV_B32 1123418112
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bb.1:
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$vgpr0 = COPY killed $vgpr1, implicit $exec
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V_CMP_GT_U32_e32 5, $vgpr1, implicit-def $vcc_lo, implicit $exec, implicit-def $vcc
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$vcc_lo = S_AND_B32 $exec_lo, $vcc_lo, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.1, implicit $vcc_lo, implicit $vcc
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S_BRANCH %bb.2
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bb.2:
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$sgpr1 = COPY $sgpr0
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S_BRANCH %bb.1
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...
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# CHECK-LABEL: bb.1:
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# CHECK: S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc_lo
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---
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name: _amdgpu_cs_main_undef
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body: |
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bb.0:
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$vgpr1 = V_MOV_B32_e32 1050, implicit $exec
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$sgpr0 = S_MOV_B32 1123418112
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bb.1:
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$vgpr0 = COPY killed $vgpr1, implicit $exec
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S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc_lo, implicit undef $vcc
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S_BRANCH %bb.2
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bb.2:
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$sgpr1 = COPY $sgpr0
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S_BRANCH %bb.1
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...
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