350bda4419
Rename the intrinsics to close to the instruction mnemonic names: Use global_load_tr_b64 and global_load_tr_b128 instead of global_load_tr. This patch also removes f16/bf16 versions of builtins/intrinsics. To simplify the design, we should avoid enumerating all possible types in implementing builtins. We can always use bitcast.
45 lines
2.0 KiB
LLVM
45 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs -mattr=+wavefrontsize32,-wavefrontsize64 < %s | FileCheck -check-prefix=GFX12 %s
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; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs -mattr=+wavefrontsize32,-wavefrontsize64 < %s | FileCheck -check-prefix=GFX12 %s
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declare <2 x i32> @llvm.amdgcn.global.load.tr.b64.v2i32.p1(ptr addrspace(1))
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declare <8 x i16> @llvm.amdgcn.global.load.tr.b128.v8i16.p1(ptr addrspace(1))
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define amdgpu_kernel void @global_load_tr_b64(ptr addrspace(1) %addr, ptr addrspace(1) %use) {
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; GFX12-LABEL: global_load_tr_b64:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
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; GFX12-NEXT: v_mov_b32_e32 v2, 0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: global_load_tr_b64 v[0:1], v2, s[0:1] offset:32
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: global_store_b64 v2, v[0:1], s[2:3]
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; GFX12-NEXT: s_nop 0
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; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
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; GFX12-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call <2 x i32> @llvm.amdgcn.global.load.tr.b64.v2i32.p1(ptr addrspace(1) %gep)
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store <2 x i32> %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_kernel void @global_load_tr_b128(ptr addrspace(1) %addr, ptr addrspace(1) %use) {
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; GFX12-LABEL: global_load_tr_b128:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
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; GFX12-NEXT: v_mov_b32_e32 v4, 0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: global_load_tr_b128 v[0:3], v4, s[0:1] offset:32
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: global_store_b128 v4, v[0:3], s[2:3]
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; GFX12-NEXT: s_nop 0
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; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
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; GFX12-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call <8 x i16> @llvm.amdgcn.global.load.tr.b128.v8i16.p1(ptr addrspace(1) %gep)
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store <8 x i16> %val, ptr addrspace(1) %use
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ret void
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}
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