9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
20 lines
782 B
LLVM
20 lines
782 B
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX10 %s
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declare i32 @llvm.amdgcn.s.get.waveid.in.workgroup() #0
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; GCN-LABEL: {{^}}test_s_get_waveid_in_workgroup:
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; GFX10: global_store_dword
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; GFX10: s_get_waveid_in_workgroup [[DEST:s[0-9]+]]
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; GFX10: s_waitcnt lgkmcnt(0)
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; GFX10: v_mov_b32_e32 [[VDEST:v[0-9]+]], [[DEST]]
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; GFX10: global_store_dword v{{[0-9]+}}, [[VDEST]], s{{\[[0-9]+:[0-9]+\]$}}
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define amdgpu_kernel void @test_s_get_waveid_in_workgroup(ptr addrspace(1) %out) {
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; Make sure %out is loaded and assiciated wait count already inserted
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store i32 0, ptr addrspace(1) %out
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%v = call i32 @llvm.amdgcn.s.get.waveid.in.workgroup()
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store i32 %v, ptr addrspace(1) %out
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ret void
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}
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attributes #0 = { nounwind }
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