Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
50 lines
2.6 KiB
LLVM
50 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -show-mc-encoding -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 %s
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; RUN: llc -mtriple=amdgcn -show-mc-encoding -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; RUN: llc -global-isel -mtriple=amdgcn -show-mc-encoding -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx90a -show-mc-encoding -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 %s
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declare void @llvm.amdgcn.s.setprio(i16) #0
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define void @test_llvm_amdgcn_s_setprio() #0 {
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; GFX9-LABEL: test_llvm_amdgcn_s_setprio:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; encoding: [0x00,0x00,0x8c,0xbf]
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; GFX9-NEXT: s_setprio 0 ; encoding: [0x00,0x00,0x8f,0xbf]
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; GFX9-NEXT: s_setprio 1 ; encoding: [0x01,0x00,0x8f,0xbf]
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; GFX9-NEXT: s_setprio 2 ; encoding: [0x02,0x00,0x8f,0xbf]
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; GFX9-NEXT: s_setprio 3 ; encoding: [0x03,0x00,0x8f,0xbf]
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; GFX9-NEXT: s_setprio 10 ; encoding: [0x0a,0x00,0x8f,0xbf]
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; GFX9-NEXT: s_setprio -1 ; encoding: [0xff,0xff,0x8f,0xbf]
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; GFX9-NEXT: s_setprio 0 ; encoding: [0x00,0x00,0x8f,0xbf]
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; GFX9-NEXT: s_setprio 1 ; encoding: [0x01,0x00,0x8f,0xbf]
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; GFX9-NEXT: s_setprio -1 ; encoding: [0xff,0xff,0x8f,0xbf]
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; GFX9-NEXT: s_setpc_b64 s[30:31] ; encoding: [0x1e,0x1d,0x80,0xbe]
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;
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; SI-LABEL: test_llvm_amdgcn_s_setprio:
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; SI: ; %bb.0:
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; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; encoding: [0x00,0x00,0x8c,0xbf]
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; SI-NEXT: s_setprio 0 ; encoding: [0x00,0x00,0x8f,0xbf]
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; SI-NEXT: s_setprio 1 ; encoding: [0x01,0x00,0x8f,0xbf]
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; SI-NEXT: s_setprio 2 ; encoding: [0x02,0x00,0x8f,0xbf]
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; SI-NEXT: s_setprio 3 ; encoding: [0x03,0x00,0x8f,0xbf]
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; SI-NEXT: s_setprio 10 ; encoding: [0x0a,0x00,0x8f,0xbf]
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; SI-NEXT: s_setprio -1 ; encoding: [0xff,0xff,0x8f,0xbf]
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; SI-NEXT: s_setprio 0 ; encoding: [0x00,0x00,0x8f,0xbf]
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; SI-NEXT: s_setprio 1 ; encoding: [0x01,0x00,0x8f,0xbf]
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; SI-NEXT: s_setprio -1 ; encoding: [0xff,0xff,0x8f,0xbf]
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; SI-NEXT: s_setpc_b64 s[30:31] ; encoding: [0x1e,0x20,0x80,0xbe]
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call void @llvm.amdgcn.s.setprio(i16 0)
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call void @llvm.amdgcn.s.setprio(i16 1)
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call void @llvm.amdgcn.s.setprio(i16 2)
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call void @llvm.amdgcn.s.setprio(i16 3)
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call void @llvm.amdgcn.s.setprio(i16 10)
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call void @llvm.amdgcn.s.setprio(i16 65535)
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call void @llvm.amdgcn.s.setprio(i16 65536)
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call void @llvm.amdgcn.s.setprio(i16 65537)
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call void @llvm.amdgcn.s.setprio(i16 -1)
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ret void
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}
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attributes #0 = { nounwind }
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