9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
32 lines
1019 B
LLVM
32 lines
1019 B
LLVM
; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG %s
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; EG-LABEL: {{^}}test_group_barrier:
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; EG: GROUP_BARRIER
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define amdgpu_kernel void @test_group_barrier(ptr addrspace(1) %out) #0 {
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entry:
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%tmp = call i32 @llvm.r600.read.tidig.x()
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%tmp1 = getelementptr i32, ptr addrspace(1) %out, i32 %tmp
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store i32 %tmp, ptr addrspace(1) %tmp1
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call void @llvm.r600.group.barrier()
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%tmp2 = call i32 @llvm.r600.read.local.size.x()
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%tmp3 = sub i32 %tmp2, 1
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%tmp4 = sub i32 %tmp3, %tmp
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%tmp5 = getelementptr i32, ptr addrspace(1) %out, i32 %tmp4
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%tmp6 = load i32, ptr addrspace(1) %tmp5
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store i32 %tmp6, ptr addrspace(1) %tmp1
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ret void
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}
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; Function Attrs: convergent nounwind
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declare void @llvm.r600.group.barrier() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.tidig.x() #2
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.local.size.x() #2
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attributes #0 = { nounwind }
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attributes #1 = { convergent nounwind }
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attributes #2 = { nounwind readnone }
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