9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
123 lines
3.7 KiB
LLVM
123 lines
3.7 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN-NOHSA,FUNC %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN-HSA,FUNC %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN-NOHSA,FUNC %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=r600 -mcpu=redwood < %s | FileCheck --check-prefixes=EG,FUNC %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=r600 -mcpu=cayman < %s | FileCheck --check-prefixes=EG,FUNC %s
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; FUNC-LABEL: {{^}}global_load_i64:
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; GCN-NOHSA: buffer_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
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; GCN-NOHSA: buffer_store_dwordx2 [[VAL]]
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; GCN-HSA: flat_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
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; GCN-HSA: flat_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, [[VAL]]
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; EG: VTX_READ_64
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define amdgpu_kernel void @global_load_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
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%ld = load i64, ptr addrspace(1) %in
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store i64 %ld, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}global_load_v2i64:
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; EG: VTX_READ_128
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define amdgpu_kernel void @global_load_v2i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
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entry:
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%ld = load <2 x i64>, ptr addrspace(1) %in
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store <2 x i64> %ld, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}global_load_v3i64:
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; GCN-NOHSA-DAG: buffer_load_dwordx4
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; GCN-NOHSA-DAG: buffer_load_dwordx2
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; GCN-HSA-DAG: flat_load_dwordx4
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; GCN-HSA-DAG: flat_load_dwordx2
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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define amdgpu_kernel void @global_load_v3i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
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entry:
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%ld = load <3 x i64>, ptr addrspace(1) %in
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store <3 x i64> %ld, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}global_load_v4i64:
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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define amdgpu_kernel void @global_load_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
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entry:
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%ld = load <4 x i64>, ptr addrspace(1) %in
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store <4 x i64> %ld, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}global_load_v8i64:
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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define amdgpu_kernel void @global_load_v8i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
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entry:
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%ld = load <8 x i64>, ptr addrspace(1) %in
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store <8 x i64> %ld, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}global_load_v16i64:
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-NOHSA: buffer_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; GCN-HSA: flat_load_dwordx4
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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define amdgpu_kernel void @global_load_v16i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
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entry:
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%ld = load <16 x i64>, ptr addrspace(1) %in
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store <16 x i64> %ld, ptr addrspace(1) %out
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ret void
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}
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attributes #0 = { nounwind }
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