9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
47 lines
1.6 KiB
LLVM
47 lines
1.6 KiB
LLVM
; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
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; GCN-LABEL: {{^}}rcp_uint:
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; GCN: v_rcp_iflag_f32_e32
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define amdgpu_kernel void @rcp_uint(ptr addrspace(1) %in, ptr addrspace(1) %out) #0 {
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%load = load i32, ptr addrspace(1) %in, align 4
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%cvt = uitofp i32 %load to float
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%div = fdiv float 1.000000e+00, %cvt, !fpmath !0
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store float %div, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}rcp_sint:
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; GCN: v_rcp_iflag_f32_e32
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define amdgpu_kernel void @rcp_sint(ptr addrspace(1) %in, ptr addrspace(1) %out) #0 {
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%load = load i32, ptr addrspace(1) %in, align 4
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%cvt = sitofp i32 %load to float
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%div = fdiv float 1.000000e+00, %cvt, !fpmath !0
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store float %div, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}rcp_uint_denorm:
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; GCN-NOT: v_rcp_iflag_f32
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define amdgpu_kernel void @rcp_uint_denorm(ptr addrspace(1) %in, ptr addrspace(1) %out) #1 {
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%load = load i32, ptr addrspace(1) %in, align 4
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%cvt = uitofp i32 %load to float
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%div = fdiv float 1.000000e+00, %cvt
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store float %div, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}rcp_sint_denorm:
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; GCN-NOT: v_rcp_iflag_f32
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define amdgpu_kernel void @rcp_sint_denorm(ptr addrspace(1) %in, ptr addrspace(1) %out) #1 {
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%load = load i32, ptr addrspace(1) %in, align 4
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%cvt = sitofp i32 %load to float
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%div = fdiv float 1.000000e+00, %cvt
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store float %div, ptr addrspace(1) %out, align 4
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ret void
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}
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!0 = !{float 2.500000e+00}
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attributes #0 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
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attributes #1 = { "denormal-fp-math-f32"="ieee,ieee" }
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