Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
30 lines
1.4 KiB
LLVM
30 lines
1.4 KiB
LLVM
; RUN: not llc -mtriple=amdgcn -mcpu=gfx908 -verify-machineinstrs -o - %s 2>%t.err | FileCheck %s
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; RUN: FileCheck -check-prefix=ERR %s < %t.err
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; This testcase would fail on an "illegal eviction". If the assert was
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; relaxed to allow equivalent cascade numbers, it would infinite loop.
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; ERR: error: inline assembly requires more registers than available
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; ERR: error: inline assembly requires more registers than available
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%asm.output = type { <16 x i32>, <8 x i32>, <5 x i32>, <4 x i32>, <16 x i32> }
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; CHECK-LABEL: {{^}}illegal_eviction_assert:
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; CHECK: ; def v[4:19] v[20:27] v[0:4] v[0:3] a[0:15]
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; CHECK: ; clobber
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; CHECK: ; use v[4:19] v[20:27] v[0:4] v[0:3] a[1:16]
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define void @illegal_eviction_assert(ptr addrspace(1) %arg) #0 {
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;%agpr0 = call i32 asm sideeffect "; def $0","=${a0}"()
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%asm = call %asm.output asm sideeffect "; def $0 $1 $2 $3 $4","=v,=v,=v,=v,={a[0:15]}"()
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%vgpr0 = extractvalue %asm.output %asm, 0
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%vgpr1 = extractvalue %asm.output %asm, 1
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%vgpr2 = extractvalue %asm.output %asm, 2
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%vgpr3 = extractvalue %asm.output %asm, 3
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%agpr0 = extractvalue %asm.output %asm, 4
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call void asm sideeffect "; clobber", "~{v[0:31]}"()
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call void asm sideeffect "; use $0 $1 $2 $3 $4","v,v,v,v,{a[1:16]}"(<16 x i32> %vgpr0, <8 x i32> %vgpr1, <5 x i32> %vgpr2, <4 x i32> %vgpr3, <16 x i32> %agpr0)
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ret void
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}
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attributes #0 = { "amdgpu-waves-per-eu"="8,8" }
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