9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
51 lines
2.4 KiB
LLVM
51 lines
2.4 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -mattr=+wavefrontsize64 -stop-after=amdgpu-remove-incompatible-functions\
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; RUN: -pass-remarks=amdgpu-remove-incompatible-functions < %s 2>%t | FileCheck -check-prefixes=GFX906 %s
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; RUN: FileCheck --check-prefix=WARN-GFX906 %s < %t
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; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -mattr=+wavefrontsize64 -verify-machineinstrs < %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -mattr=+wavefrontsize64 -stop-after=amdgpu-remove-incompatible-functions\
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; RUN: -pass-remarks=amdgpu-remove-incompatible-functions < %s 2>%t | FileCheck -check-prefixes=GFX90A %s
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; RUN: FileCheck --check-prefix=WARN-GFX90A %s < %t
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; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -mattr=+wavefrontsize64 -verify-machineinstrs < %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1011 -mattr=+wavefrontsize64 -stop-after=amdgpu-remove-incompatible-functions\
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; RUN: -pass-remarks=amdgpu-remove-incompatible-functions < %s 2>%t | FileCheck -check-prefixes=GFX10 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1011 -mattr=+wavefrontsize64 -verify-machineinstrs < %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -stop-after=amdgpu-remove-incompatible-functions\
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; RUN: -pass-remarks=amdgpu-remove-incompatible-functions < %s 2>%t | FileCheck -check-prefixes=GFX11 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -verify-machineinstrs < %s
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; WARN-GFX906: removing function 'needs_wavefrontsize32': +wavefrontsize32 is not supported on the current target
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; WARN-GFX906-NOT: not supported
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; WARN-GFX90A: removing function 'needs_wavefrontsize32': +wavefrontsize32 is not supported on the current target
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; WARN-GFX90A-NOT: not supported
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define void @needs_wavefrontsize32(ptr %out) #0 {
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; GFX906-NOT: @needs_wavefrontsize32
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; GFX90A-NOT: @needs_wavefrontsize32
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; GFX10: define void @needs_wavefrontsize32(
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; GFX11: define void @needs_wavefrontsize32(
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%1 = tail call i32 @llvm.read_register.i32(metadata !0)
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%2 = tail call i32 @llvm.ctpop.i32(i32 %1)
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store i32 %2, ptr %out, align 4
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ret void
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}
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define void @caller(ptr %out) {
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; GFX906: call void null(
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; GFX90A: call void null(
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; GFX10: call void @needs_wavefrontsize32(
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; GFX11: call void @needs_wavefrontsize32(
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call void @needs_wavefrontsize32(ptr %out)
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ret void
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}
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declare i32 @llvm.read_register.i32(metadata)
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declare i32 @llvm.ctpop.i32(i32)
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!0 = !{!"exec_lo"}
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attributes #0 = { "target-features"="+wavefrontsize32" }
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