9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
17 lines
726 B
LLVM
17 lines
726 B
LLVM
; RUN: llc -o - %s -mtriple=amdgcn -mcpu=verde -verify-machineinstrs -stop-after finalize-isel | FileCheck %s
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; This test verifies that the instruction selection will add the implicit
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; register operands in the correct order when modifying the opcode of an
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; instruction to V_ADD_CO_U32_e32.
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; CHECK: %{{[0-9]+}}:vgpr_32 = V_ADD_CO_U32_e32 %{{[0-9]+}}, %{{[0-9]+}}, implicit-def $vcc, implicit $exec
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define amdgpu_kernel void @test(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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entry:
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%b_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1
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%a = load volatile i32, ptr addrspace(1) %in
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%b = load volatile i32, ptr addrspace(1) %b_ptr
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%result = add i32 %a, %b
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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