9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
31 lines
1.4 KiB
LLVM
31 lines
1.4 KiB
LLVM
; RUN: llc -mtriple=amdgcn < %s
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; Tests for a bug in SelectionDAG::UpdateNodeOperands exposed by VectorLegalizer
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; where divergence information is not updated.
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declare i32 @llvm.amdgcn.workitem.id.x()
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define amdgpu_kernel void @spam(ptr addrspace(1) noalias %arg) {
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%tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
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%tmp1 = zext i32 %tmp to i64
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%tmp2 = getelementptr inbounds double, ptr addrspace(1) %arg, i64 %tmp1
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%tmp3 = load double, ptr addrspace(1) %tmp2, align 8
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%tmp4 = fadd double undef, 0.000000e+00
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%tmp5 = insertelement <2 x double> undef, double %tmp4, i64 0
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%tmp6 = insertelement <2 x double> %tmp5, double %tmp3, i64 1
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%tmp7 = insertelement <2 x double> %tmp6, double 0.000000e+00, i64 1
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%tmp8 = fadd <2 x double> zeroinitializer, undef
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%tmp9 = fadd <2 x double> %tmp7, zeroinitializer
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%tmp10 = extractelement <2 x double> %tmp8, i64 0
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%tmp11 = getelementptr inbounds double, ptr addrspace(1) %tmp2, i64 2
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store double %tmp10, ptr addrspace(1) %tmp11, align 8
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%tmp12 = getelementptr inbounds double, ptr addrspace(1) %tmp2, i64 3
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store double undef, ptr addrspace(1) %tmp12, align 8
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%tmp13 = extractelement <2 x double> %tmp9, i64 0
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%tmp14 = getelementptr inbounds double, ptr addrspace(1) %tmp2, i64 6
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store double %tmp13, ptr addrspace(1) %tmp14, align 8
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%tmp15 = getelementptr inbounds double, ptr addrspace(1) %tmp2, i64 7
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store double 0.000000e+00, ptr addrspace(1) %tmp15, align 8
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ret void
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}
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