9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
82 lines
2.6 KiB
LLVM
82 lines
2.6 KiB
LLVM
; RUN: llc -mtriple=r600 -mcpu=redwood -mtriple=r600-- < %s | FileCheck %s
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; We want all MULLO_INT inst to be last in their instruction group
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;CHECK: {{^}}fill3d:
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;CHECK-NOT: MULLO_INT T[0-9]+
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define amdgpu_kernel void @fill3d(ptr addrspace(1) nocapture %out) #0 {
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entry:
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%x.i = tail call i32 @llvm.r600.read.global.size.x() #1
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%y.i18 = tail call i32 @llvm.r600.read.global.size.y() #1
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%mul = mul i32 %y.i18, %x.i
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%z.i17 = tail call i32 @llvm.r600.read.global.size.z() #1
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%mul3 = mul i32 %mul, %z.i17
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%x.i.i = tail call i32 @llvm.r600.read.tgid.x() #1
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%x.i12.i = tail call i32 @llvm.r600.read.local.size.x() #1
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%mul26.i = mul i32 %x.i12.i, %x.i.i
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%x.i4.i = tail call i32 @llvm.r600.read.tidig.x() #1
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%add.i16 = add i32 %x.i4.i, %mul26.i
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%mul7 = mul i32 %add.i16, %y.i18
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%y.i.i = tail call i32 @llvm.r600.read.tgid.y() #1
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%y.i14.i = tail call i32 @llvm.r600.read.local.size.y() #1
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%mul30.i = mul i32 %y.i14.i, %y.i.i
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%y.i6.i = tail call i32 @llvm.r600.read.tidig.y() #1
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%add.i14 = add i32 %mul30.i, %mul7
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%mul819 = add i32 %add.i14, %y.i6.i
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%add = mul i32 %mul819, %z.i17
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%z.i.i = tail call i32 @llvm.r600.read.tgid.z() #1
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%z.i16.i = tail call i32 @llvm.r600.read.local.size.z() #1
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%mul33.i = mul i32 %z.i16.i, %z.i.i
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%z.i8.i = tail call i32 @llvm.r600.read.tidig.z() #1
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%add.i = add i32 %z.i8.i, %mul33.i
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%add13 = add i32 %add.i, %add
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%arrayidx = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %add13
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store i32 %mul3, ptr addrspace(1) %arrayidx, align 4
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ret void
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.tgid.x() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.tgid.y() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.tgid.z() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.local.size.x() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.local.size.y() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.local.size.z() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.tidig.x() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.tidig.y() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.tidig.z() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.global.size.x() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.global.size.y() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.global.size.z() #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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!opencl.kernels = !{!0, !1, !2}
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!0 = !{null}
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!1 = !{null}
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!2 = !{ptr @fill3d}
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