e3cf80c5c1
BlockFrequencyInfo calculates block frequencies as Scaled64 numbers but as a last step converts them to unsigned 64bit integers (`BlockFrequency`). This improves the factors picked for this conversion so that: * Avoid big numbers close to UINT64_MAX to avoid users overflowing/saturating when adding multiply frequencies together or when multiplying with integers. This leaves the topmost 10 bits unused to allow for some room. * Spread the difference between hottest/coldest block as much as possible to increase precision. * If the hot/cold spread cannot be represented loose precision at the lower end, but keep the frequencies at the upper end for hot blocks differentiable.
83 lines
3.2 KiB
LLVM
83 lines
3.2 KiB
LLVM
; RUN: llc < %s -relocation-model=pic -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -relocation-model=pic -mtriple=thumbv6-apple-darwin | FileCheck %s -check-prefix=THUMB
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; RUN: llc < %s -relocation-model=static -mtriple=thumbv7-apple-darwin | FileCheck %s -check-prefix=THUMB2
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; RUN: llc < %s -relocation-model=static -mtriple=thumbv8-apple-darwin | FileCheck %s -check-prefix=THUMB2
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@nextaddr = global ptr null ; <ptr> [#uses=2]
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@C.0.2070 = private constant [5 x ptr] [ptr blockaddress(@foo, %L1), ptr blockaddress(@foo, %L2), ptr blockaddress(@foo, %L3), ptr blockaddress(@foo, %L4), ptr blockaddress(@foo, %L5)] ; <ptr> [#uses=1]
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define internal i32 @foo(i32 %i) nounwind {
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; ARM-LABEL: foo:
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; THUMB-LABEL: foo:
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; THUMB2-LABEL: foo:
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entry:
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; _nextaddr gets CSEed for use later on.
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; THUMB: ldr r[[NEXTADDR_REG:[0-9]+]], [[NEXTADDR_CPI:LCPI0_[0-9]+]]
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; THUMB: [[NEXTADDR_PCBASE:LPC0_[0-9]]]:
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; THUMB: add r[[NEXTADDR_REG]], pc
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%0 = load ptr, ptr @nextaddr, align 4 ; <ptr> [#uses=2]
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%1 = icmp eq ptr %0, null ; <i1> [#uses=1]
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; indirect branch gets duplicated here
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; ARM: bx
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; THUMB: mov pc,
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; THUMB2: mov pc,
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br i1 %1, label %bb3, label %bb2
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bb2: ; preds = %entry, %bb3
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%gotovar.4.0 = phi ptr [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <ptr> [#uses=1]
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; ARM: bx
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; THUMB: mov pc,
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indirectbr ptr %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
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bb3: ; preds = %entry
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%2 = getelementptr inbounds [5 x ptr], ptr @C.0.2070, i32 0, i32 %i ; <ptr> [#uses=1]
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%gotovar.4.0.pre = load ptr, ptr %2, align 4 ; <ptr> [#uses=1]
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br label %bb2
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L5: ; preds = %bb2
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br label %L4
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L4: ; preds = %L5, %bb2
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%res.0 = phi i32 [ 385, %L5 ], [ 35, %bb2 ] ; <i32> [#uses=1]
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br label %L3
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L3: ; preds = %L4, %bb2
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%res.1 = phi i32 [ %res.0, %L4 ], [ 5, %bb2 ] ; <i32> [#uses=1]
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br label %L2
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L2: ; preds = %L3, %bb2
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%res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i32> [#uses=1]
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%phitmp = mul i32 %res.2, 6 ; <i32> [#uses=1]
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br label %L1
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L1: ; preds = %L2, %bb2
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%res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1]
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; ARM-LABEL: %L1
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; ARM: ldr [[R_NEXTADDR:r[0-9]+]], LCPI
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; ARM: ldr [[R1:r[0-9]+]], LCPI
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; ARM: add [[R_NEXTADDR_b:r[0-9]+]], pc, [[R_NEXTADDR]]
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; ARM: add [[R1b:r[0-9]+]], pc, [[R1]]
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; ARM: str [[R1b]], [[[R_NEXTADDR_b]]]
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; THUMB: %L1
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; THUMB: b [[SPLITBB:LBB[0-9_]+]]
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; THUMB: %.split4
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; THUMB: muls
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; THUMB: [[SPLITBB]]:
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; THUMB: ldr [[R2:r[0-9]+]], LCPI
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; THUMB: add [[R2]], pc
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; THUMB: str [[R2]], [r[[NEXTADDR_REG]]]
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; THUMB2-LABEL: %L1
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; THUMB2: ldr [[R2:r[0-9]+]], LCPI
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; THUMB2-NEXT: str{{(.w)?}} [[R2]]
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store ptr blockaddress(@foo, %L5), ptr @nextaddr, align 4
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ret i32 %res.3
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}
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; ARM: .long Ltmp0-(LPC{{.*}}+8)
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; THUMB: .long Ltmp0-(LPC{{.*}}+4)
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; THUMB: .long _nextaddr-([[NEXTADDR_PCBASE]]+4)
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; THUMB2: .long Ltmp0
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