When LLVM is build with `LLVM_ENABLE_EXPENSIVE_CHECKS=ON` option the
following C code snippet:
struct t {
int a;
} __attribute__((preserve_access_index));
void test(struct t *t) {
t->a = 42;
}
Causes an assertion:
$ clang -g -O2 -c --target=bpf -mcpu=v2 t.c -o /dev/null
Function Live Ins: $r1 in %0
bb.0.entry:
liveins: $r1
DBG_VALUE $r1, $noreg, !"t", ...
%0:gpr = COPY $r1
DBG_VALUE %0:gpr, $noreg, !"t", ...
%1:gpr = LD_imm64 @"llvm.t:0:0$0:0"
%3:gpr = ADD_rr %0:gpr(tied-def 0), killed %1:gpr
%4:gpr = MOV_ri 42
CORE_MEM killed %4:gpr, 411, %0:gpr, @"llvm.t:0:0$0:0", ...
RET debug-location !25; t.c:7:1
*** Bad machine code: Explicit definition marked as use ***
- function: test
- basic block: %bb.0 entry (0x6210000d8a90)
- instruction: CORE_MEM killed %4:gpr, 411, %0:gpr, @"llvm.t:0:0$0:0", ...
- operand 0: killed %4:gpr
This happens because `CORE_MEM` instruction is defined to have output
operands:
def CORE_MEM : TYPE_LD_ST<BPF_MEM.Value, BPF_W.Value,
(outs GPR:$dst),
(ins u64imm:$opcode, GPR:$src, u64imm:$offset),
"$dst = core_mem($opcode, $src, $offset)",
[]>;
As documented in [1]:
> By convention, the LLVM code generator orders instruction operands
> so that all register definitions come before the register uses, even
> on architectures that are normally printed in other orders.
In other words, the first argument for `CORE_MEM` is considered to be
a "def", while in reality it is "use":
%1:gpr = LD_imm64 @"llvm.t:0:0$0:0"
%3:gpr = ADD_rr %0:gpr(tied-def 0), killed %1:gpr
%4:gpr = MOV_ri 42
'---------------.
v
CORE_MEM killed %4:gpr, 411, %0:gpr, @"llvm.t:0:0$0:0", ...
Here is how `CORE_MEM` is constructed in
`BPFMISimplifyPatchable::checkADDrr()`:
BuildMI(*DefInst->getParent(), *DefInst, DefInst->getDebugLoc(), TII->get(COREOp))
.add(DefInst->getOperand(0)).addImm(Opcode).add(*BaseOp)
.addGlobalAddress(GVal);
Note that first operand is constructed as `.add(DefInst->getOperand(0))`.
For `LD{D,W,H,B}` instructions the `DefInst->getOperand(0)` is a
destination register of a load, so instruction is constructed in
accordance with `outs` declaration.
For `ST{D,W,H,B}` instructions the `DefInst->getOperand(0)` is a
source register of a store (value to be stored), so instruction
violates the `outs` declaration.
This commit fixes the issue by splitting `CORE_MEM` in three
instructions: `CORE_ST`, `CORE_LD64`, `CORE_LD32` with correct `outs`
specifications.
[1] https://llvm.org/docs/CodeGenerator.html#the-machineinstr-class
Differential Revision: https://reviews.llvm.org/D157806
165 lines
7.3 KiB
LLVM
165 lines
7.3 KiB
LLVM
; RUN: llc -mtriple=bpf -mcpu=v2 < %s | FileCheck -check-prefixes=CHECK,V2 %s
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; RUN: llc -mtriple=bpf -mcpu=v4 < %s | FileCheck -check-prefixes=CHECK,V4 %s
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; Verify that BPFMISimplifyPatchable::checkADDrr correctly rewrites
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; store instructions.
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;
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; Generated from the following source code:
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; struct t {
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; unsigned char ub;
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; unsigned short uh;
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; unsigned int uw;
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; unsigned long ud;
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; } __attribute__((preserve_access_index));
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;
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; void foo(volatile struct t *t) {
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; t->ub = 1;
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; t->uh = 2;
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; t->uw = 3;
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; t->ud = 4;
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; }
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;
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; Using the following command:
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; clang -g -O2 -S -emit-llvm --target=bpf t.c -o t.ll
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@"llvm.t:0:0$0:0" = external global i64, !llvm.preserve.access.index !0 #0
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@"llvm.t:0:2$0:1" = external global i64, !llvm.preserve.access.index !0 #0
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@"llvm.t:0:4$0:2" = external global i64, !llvm.preserve.access.index !0 #0
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@"llvm.t:0:8$0:3" = external global i64, !llvm.preserve.access.index !0 #0
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; Function Attrs: nofree nounwind
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define dso_local void @foo(ptr noundef %t, i64 noundef %v) local_unnamed_addr #1 !dbg !18 {
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entry:
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call void @llvm.dbg.value(metadata ptr %t, metadata !24, metadata !DIExpression()), !dbg !26
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call void @llvm.dbg.value(metadata i64 %v, metadata !25, metadata !DIExpression()), !dbg !26
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%conv = trunc i64 %v to i8, !dbg !27
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%0 = load i64, ptr @"llvm.t:0:0$0:0", align 8
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%1 = getelementptr i8, ptr %t, i64 %0
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%2 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 0, ptr %1)
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store volatile i8 %conv, ptr %2, align 8, !dbg !28, !tbaa !29
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%conv1 = trunc i64 %v to i16, !dbg !36
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%3 = load i64, ptr @"llvm.t:0:2$0:1", align 8
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%4 = getelementptr i8, ptr %t, i64 %3
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%5 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 1, ptr %4)
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store volatile i16 %conv1, ptr %5, align 2, !dbg !37, !tbaa !38
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%conv2 = trunc i64 %v to i32, !dbg !39
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%6 = load i64, ptr @"llvm.t:0:4$0:2", align 8
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%7 = getelementptr i8, ptr %t, i64 %6
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%8 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 2, ptr %7)
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store volatile i32 %conv2, ptr %8, align 4, !dbg !40, !tbaa !41
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%9 = load i64, ptr @"llvm.t:0:8$0:3", align 8
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%10 = getelementptr i8, ptr %t, i64 %9
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%11 = tail call ptr @llvm.bpf.passthrough.p0.p0(i32 3, ptr %10)
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store volatile i64 %v, ptr %11, align 8, !dbg !42, !tbaa !43
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ret void, !dbg !44
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}
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; CHECK: foo:
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; CHECK: prologue_end
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; CHECK-NEXT: .Ltmp[[LABEL_UB:.*]]:
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; CHECK-NEXT: .Ltmp
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; V2-NEXT: *(u8 *)(r1 + 0) = r2
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; V4-NEXT: *(u8 *)(r1 + 0) = w2
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; CHECK-NEXT: .loc
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; CHECK-NEXT: .Ltmp[[LABEL_UH:.*]]:
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; CHECK-NEXT: .Ltmp
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; V2-NEXT: *(u16 *)(r1 + 2) = r2
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; V4-NEXT: *(u16 *)(r1 + 2) = w2
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; CHECK-NEXT: .loc
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; CHECK-NEXT: .Ltmp[[LABEL_UW:.*]]:
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; CHECK-NEXT: .Ltmp
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; V2-NEXT: *(u32 *)(r1 + 4) = r2
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; V4-NEXT: *(u32 *)(r1 + 4) = w2
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; CHECK-NEXT: .loc
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; CHECK-NEXT: .Ltmp[[LABEL_UD:.*]]:
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; CHECK-NEXT: .Ltmp
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; CHECK-NEXT: *(u64 *)(r1 + 8) = r2
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; CHECK: .section .BTF
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; CHECK: .long [[STR_T:.*]] # BTF_KIND_STRUCT(id = [[ID:.*]])
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; CHECK: .byte 116 # string offset=[[STR_T]]
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; CHECK: .ascii "0:0" # string offset=[[STR_UB:.*]]
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; CHECK: .ascii "0:1" # string offset=[[STR_UH:.*]]
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; CHECK: .ascii "0:2" # string offset=[[STR_UW:.*]]
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; CHECK: .ascii "0:3" # string offset=[[STR_UD:.*]]
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; CHECK: # FieldReloc
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; CHECK: .long .Ltmp[[LABEL_UB]]
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; CHECK-NEXT: .long [[ID]]
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; CHECK-NEXT: .long [[STR_UB]]
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; CHECK-NEXT: .long 0
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; CHECK: .long .Ltmp[[LABEL_UH]]
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; CHECK-NEXT: .long [[ID]]
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; CHECK-NEXT: .long [[STR_UH]]
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; CHECK-NEXT: .long 0
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; CHECK: .long .Ltmp[[LABEL_UW]]
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; CHECK-NEXT: .long [[ID]]
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; CHECK-NEXT: .long [[STR_UW]]
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; CHECK-NEXT: .long 0
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; CHECK: .long .Ltmp[[LABEL_UD]]
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; CHECK-NEXT: .long [[ID]]
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; CHECK-NEXT: .long [[STR_UD]]
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; CHECK-NEXT: .long 0
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; Function Attrs: nofree nosync nounwind memory(none)
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declare ptr @llvm.bpf.passthrough.p0.p0(i32, ptr) #2
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; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
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declare void @llvm.dbg.value(metadata, metadata, metadata) #3
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attributes #0 = { "btf_ama" }
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attributes #1 = { nofree nounwind "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #2 = { nofree nosync nounwind memory(none) }
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attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
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!llvm.dbg.cu = !{!11}
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!llvm.module.flags = !{!12, !13, !14, !15, !16}
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!llvm.ident = !{!17}
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!0 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "t", file: !1, line: 1, size: 128, elements: !2)
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!1 = !DIFile(filename: "some.file", directory: "/some/dir", checksumkind: CSK_MD5, checksum: "2067f770ab52f9042a61e5bf50a913bd")
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!2 = !{!3, !5, !7, !9}
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!3 = !DIDerivedType(tag: DW_TAG_member, name: "ub", scope: !0, file: !1, line: 2, baseType: !4, size: 8)
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!4 = !DIBasicType(name: "unsigned char", size: 8, encoding: DW_ATE_unsigned_char)
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!5 = !DIDerivedType(tag: DW_TAG_member, name: "uh", scope: !0, file: !1, line: 3, baseType: !6, size: 16, offset: 16)
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!6 = !DIBasicType(name: "unsigned short", size: 16, encoding: DW_ATE_unsigned)
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!7 = !DIDerivedType(tag: DW_TAG_member, name: "uw", scope: !0, file: !1, line: 4, baseType: !8, size: 32, offset: 32)
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!8 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
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!9 = !DIDerivedType(tag: DW_TAG_member, name: "ud", scope: !0, file: !1, line: 5, baseType: !10, size: 64, offset: 64)
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!10 = !DIBasicType(name: "unsigned long", size: 64, encoding: DW_ATE_unsigned)
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!11 = distinct !DICompileUnit(language: DW_LANG_C11, file: !1, producer: "clang version 18.0.0 (/home/eddy/work/llvm-project/clang 3810f2eb4382d5e2090ce5cd47f45379cb453c35)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
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!12 = !{i32 7, !"Dwarf Version", i32 5}
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!13 = !{i32 2, !"Debug Info Version", i32 3}
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!14 = !{i32 1, !"wchar_size", i32 4}
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!15 = !{i32 7, !"frame-pointer", i32 2}
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!16 = !{i32 7, !"debug-info-assignment-tracking", i1 true}
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!17 = !{!"clang version 18.0.0 (/home/eddy/work/llvm-project/clang 3810f2eb4382d5e2090ce5cd47f45379cb453c35)"}
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!18 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 13, type: !19, scopeLine: 13, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !11, retainedNodes: !23)
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!19 = !DISubroutineType(types: !20)
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!20 = !{null, !21, !10}
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!21 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !22, size: 64)
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!22 = !DIDerivedType(tag: DW_TAG_volatile_type, baseType: !0)
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!23 = !{!24, !25}
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!24 = !DILocalVariable(name: "t", arg: 1, scope: !18, file: !1, line: 13, type: !21)
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!25 = !DILocalVariable(name: "v", arg: 2, scope: !18, file: !1, line: 13, type: !10)
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!26 = !DILocation(line: 0, scope: !18)
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!27 = !DILocation(line: 14, column: 11, scope: !18)
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!28 = !DILocation(line: 14, column: 9, scope: !18)
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!29 = !{!30, !31, i64 0}
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!30 = !{!"t", !31, i64 0, !33, i64 2, !34, i64 4, !35, i64 8}
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!31 = !{!"omnipotent char", !32, i64 0}
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!32 = !{!"Simple C/C++ TBAA"}
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!33 = !{!"short", !31, i64 0}
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!34 = !{!"int", !31, i64 0}
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!35 = !{!"long", !31, i64 0}
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!36 = !DILocation(line: 15, column: 11, scope: !18)
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!37 = !DILocation(line: 15, column: 9, scope: !18)
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!38 = !{!30, !33, i64 2}
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!39 = !DILocation(line: 16, column: 11, scope: !18)
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!40 = !DILocation(line: 16, column: 9, scope: !18)
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!41 = !{!30, !34, i64 4}
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!42 = !DILocation(line: 17, column: 9, scope: !18)
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!43 = !{!30, !35, i64 8}
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!44 = !DILocation(line: 18, column: 1, scope: !18)
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