Files
clang-p2996/llvm/test/CodeGen/BPF/inlineasm-wreg.ll
Alessandro Decina 833e9b2ea7 [BPF] add support for 32 bit registers in inline asm
Add "w" constraint type which allows selecting 32 bit registers.
32 bit registers were added in https://reviews.llvm.org/rGca31c3bb3ff149850b664838fbbc7d40ce571879.

Differential Revision: https://reviews.llvm.org/D102118
2021-05-16 11:01:47 -07:00

19 lines
646 B
LLVM

; RUN: llc < %s -march=bpfel -mattr=+alu32 -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -march=bpfeb -mattr=+alu32 -verify-machineinstrs | FileCheck %s
; Test that %w works as input constraint
; CHECK-LABEL: test_inlineasm_w_input_constraint
define dso_local i32 @test_inlineasm_w_input_constraint() {
tail call void asm sideeffect "w0 = $0", "w"(i32 42)
; CHECK: w0 = w1
ret i32 42
}
; Test that %w works as output constraint
; CHECK-LABEL: test_inlineasm_w_output_constraint
define dso_local i32 @test_inlineasm_w_output_constraint() {
%1 = tail call i32 asm sideeffect "$0 = $1", "=w,i"(i32 42)
; CHECK: w0 = 42
ret i32 %1
}