6c412b6c6f
In [1], a few new insns are proposed to expand BPF ISA to
. fixing the limitation of existing insn (e.g., 16bit jmp offset)
. adding new insns which may improve code quality
(sign_ext_ld, sign_ext_mov, st)
. feature complete (sdiv, smod)
. better user experience (bswap)
This patch implemented insn encoding for
. sign-extended load
. sign-extended mov
. sdiv/smod
. bswap insns
. unconditional jump with 32bit offset
The new bswap insns are generated under cpu=v4 for __builtin_bswap.
For cpu=v3 or earlier, for __builtin_bswap, be or le insns are generated
which is not intuitive for the user.
To support 32-bit branch offset, a 32-bit ja (JMPL) insn is implemented.
For conditional branch which is beyond 16-bit offset, llvm will do
some transformation 'cond_jmp' -> 'cond_jmp + jmpl' to simulate 32bit
conditional jmp. See BPFMIPeephole.cpp for details. The algorithm is
hueristic based. I have tested bpf selftest pyperf600 with unroll account
600 which can indeed generate 32-bit jump insn, e.g.,
13: 06 00 00 00 9b cd 00 00 gotol +0xcd9b <LBB0_6619>
Eduard is working on to add 'st' insn to cpu=v4.
A list of llc flags:
disable-ldsx, disable-movsx, disable-bswap,
disable-sdiv-smod, disable-gotol
can be used to disable a particular insn for cpu v4.
For example, user can do:
llc -march=bpf -mcpu=v4 -disable-movsx t.ll
to enable cpu v4 without movsx insns.
References:
[1] https://lore.kernel.org/bpf/4bfe98be-5333-1c7e-2f6d-42486c8ec039@meta.com/
Differential Revision: https://reviews.llvm.org/D144829
87 lines
2.9 KiB
LLVM
87 lines
2.9 KiB
LLVM
; RUN: llc -march=bpfel -mcpu=v4 -verify-machineinstrs -show-mc-encoding < %s | FileCheck %s
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; Source:
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; short f1(int a) {
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; return (char)a;
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; }
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; int f2(int a) {
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; return (short)a;
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; }
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; long f3(int a) {
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; return (char)a;
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; }
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; long f4(int a) {
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; return (short)a;
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; }
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; long f5(int a) {
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; return a;
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; }
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; long f6(long a) {
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; return (int)a;
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; }
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; Compilation flags:
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; clang -target bpf -O2 -mcpu=v4 -S -emit-llvm t.c
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; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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define dso_local i16 @f1(i32 noundef %a) local_unnamed_addr #0 {
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entry:
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%conv = trunc i32 %a to i8
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%conv1 = sext i8 %conv to i16
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ret i16 %conv1
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}
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; CHECK: w0 = (s8)w1 # encoding: [0xbc,0x10,0x08,0x00,0x00,0x00,0x00,0x00]
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; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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define dso_local i32 @f2(i32 noundef %a) local_unnamed_addr #0 {
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entry:
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%sext = shl i32 %a, 16
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%conv1 = ashr exact i32 %sext, 16
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ret i32 %conv1
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}
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; CHECK: w0 = (s16)w1 # encoding: [0xbc,0x10,0x10,0x00,0x00,0x00,0x00,0x00]
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; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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define dso_local i64 @f3(i32 noundef %a) local_unnamed_addr #0 {
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entry:
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%conv = zext i32 %a to i64
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%sext = shl i64 %conv, 56
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%conv1 = ashr exact i64 %sext, 56
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ret i64 %conv1
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}
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; CHECK: r0 = (s8)r1 # encoding: [0xbf,0x10,0x08,0x00,0x00,0x00,0x00,0x00]
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; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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define dso_local i64 @f4(i32 noundef %a) local_unnamed_addr #0 {
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entry:
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%conv = zext i32 %a to i64
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%sext = shl i64 %conv, 48
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%conv1 = ashr exact i64 %sext, 48
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ret i64 %conv1
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}
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; CHECK: r0 = (s16)r1 # encoding: [0xbf,0x10,0x10,0x00,0x00,0x00,0x00,0x00]
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; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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define dso_local i64 @f5(i32 noundef %a) local_unnamed_addr #0 {
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entry:
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%conv = sext i32 %a to i64
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ret i64 %conv
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}
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; CHECK: r0 = (s32)r1 # encoding: [0xbf,0x10,0x20,0x00,0x00,0x00,0x00,0x00]
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; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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define dso_local i64 @f6(i64 noundef %a) local_unnamed_addr #0 {
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entry:
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%sext = shl i64 %a, 32
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%conv1 = ashr exact i64 %sext, 32
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ret i64 %conv1
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}
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; CHECK: r0 = (s32)r1 # encoding: [0xbf,0x10,0x20,0x00,0x00,0x00,0x00,0x00]
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attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="v4" }
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!llvm.module.flags = !{!0, !1}
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!llvm.ident = !{!2}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 7, !"frame-pointer", i32 2}
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!2 = !{!"clang version 17.0.0 (https://github.com/llvm/llvm-project.git 4e1ca21db4162f0c3cde98f730b08ed538fff2a4)"}
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