8386a388bd
closes #70071 - `CGBuiltin.cpp` - Add the unsigned\generic clamp intrinsic emitter. - `IntrinsicsDirectX.td` - add the `dx.clamp` & `dx.uclamp` intrinsics - `DXILIntrinsicExpansion.cpp` - add the `clamp` instruction expansion while maintaining vector form. - `SemaChecking.cpp` - Add `clamp` builtin Sema Checks. - `Builtins.td` - add a `clamp` builtin - `hlsl_intrinsics.h` - add the `clamp` api Why `clamp` as instruction expansion for DXIL? 1. SPIR-V has a GLSL `clamp` extension via: - [FClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#FClamp) - [UClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#UClamp) - [SClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#SClamp) 2. Further Clamp lowers to `min(max( x, min_range ), max_range)` which we have float, signed, & unsigned dixilOps.
32 lines
1.0 KiB
LLVM
32 lines
1.0 KiB
LLVM
; RUN: opt -S -dxil-op-lower < %s | FileCheck %s
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; Make sure dxil operation function calls for fmin are generated for half/float/double.
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; CHECK-LABEL:test_fmin_half
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define noundef half @test_fmin_half(half noundef %a, half noundef %b) {
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entry:
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; CHECK: call half @dx.op.binary.f16(i32 36, half %{{.*}}, half %{{.*}})
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%0 = call half @llvm.minnum.f16(half %a, half %b)
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ret half %0
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}
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; CHECK-LABEL:test_fmin_float
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define noundef float @test_fmin_float(float noundef %a, float noundef %b) {
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entry:
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; CHECK: call float @dx.op.binary.f32(i32 36, float %{{.*}}, float %{{.*}})
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%0 = call float @llvm.minnum.f32(float %a, float %b)
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ret float %0
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}
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; CHECK-LABEL:test_fmin_double
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define noundef double @test_fmin_double(double noundef %a, double noundef %b) {
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entry:
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; CHECK: call double @dx.op.binary.f64(i32 36, double %{{.*}}, double %{{.*}})
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%0 = call double @llvm.minnum.f64(double %a, double %b)
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ret double %0
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}
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declare half @llvm.minnum.f16(half, half)
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declare float @llvm.minnum.f32(float, float)
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declare double @llvm.minnum.f64(double, double)
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