54f631d116
Implement an abstraction to specify precise overload types supported by DXIL ops. These overload types are typically a subset of LLVM intrinsics. Implement the corresponding changes in DXILEmitter backend. Add tests to verify expected errors for unsupported overload types at code generation time. Add tests to check for correct overload error output.
32 lines
1.1 KiB
LLVM
32 lines
1.1 KiB
LLVM
; RUN: opt -S -dxil-op-lower < %s | FileCheck %s
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; Make sure dxil operation function calls for frac are generated for float and half.
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; CHECK:call float @dx.op.unary.f32(i32 22, float %{{.*}})
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; CHECK:call half @dx.op.unary.f16(i32 22, half %{{.*}})
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target datalayout = "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:32-f64:64-n8:16:32:64"
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target triple = "dxil-pc-shadermodel6.7-library"
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; Function Attrs: noinline nounwind optnone
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define noundef float @frac_float(float noundef %a) #0 {
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entry:
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%a.addr = alloca float, align 4
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store float %a, ptr %a.addr, align 4
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%0 = load float, ptr %a.addr, align 4
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%dx.frac = call float @llvm.dx.frac.f32(float %0)
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ret float %dx.frac
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}
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; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
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declare float @llvm.dx.frac.f32(float) #1
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; Function Attrs: noinline nounwind optnone
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define noundef half @frac_half(half noundef %a) #0 {
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entry:
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%a.addr = alloca half, align 2
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store half %a, ptr %a.addr, align 2
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%0 = load half, ptr %a.addr, align 2
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%dx.frac = call half @llvm.dx.frac.f16(half %0)
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ret half %dx.frac
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}
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