e0919b189b
RegAllocGreedy uses SlotIndexes::getApproxInstrDistance to approximate the length of a live range for its heuristics. Renumbering all slot indexes with the default instruction distance ensures that this estimate will be as accurate as possible, and will not depend on the history of how instructions have been added to and removed from SlotIndexes's maps. This also means that enabling -early-live-intervals, which runs the SlotIndexes analysis earlier, will not cause large amounts of churn due to different register allocator decisions.
66 lines
1.7 KiB
LLVM
66 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -march=hexagon < %s | FileCheck %s
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; Function Attrs: nounwind
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define i32 @f0(i32 %a0, i32 %a1, i32 %a2) #0 {
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; CHECK-LABEL: f0:
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; CHECK: // %bb.0: // %b0
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; CHECK-NEXT: {
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; CHECK-NEXT: p0 = !tstbit(r1,r2)
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; CHECK-NEXT: r17:16 = combine(r1,r0)
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; CHECK-NEXT: memd(r29+#-16) = r17:16
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; CHECK-NEXT: allocframe(#8)
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; CHECK-NEXT: } // 8-byte Folded Spill
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; CHECK-NEXT: {
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; CHECK-NEXT: if (p0) jump:nt .LBB0_2
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; CHECK-NEXT: }
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; CHECK-NEXT: // %bb.1: // %b1
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; CHECK-NEXT: {
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; CHECK-NEXT: call f1
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: jump .LBB0_3
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; CHECK-NEXT: }
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; CHECK-NEXT: .LBB0_2: // %b2
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; CHECK-NEXT: {
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; CHECK-NEXT: call f2
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; CHECK-NEXT: }
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; CHECK-NEXT: .LBB0_3: // %b3
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; CHECK-NEXT: {
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; CHECK-NEXT: call f3
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; CHECK-NEXT: r1 = add(r17,#2)
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; CHECK-NEXT: r0 = r16
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = #0
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; CHECK-NEXT: r17:16 = memd(r29+#0)
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; CHECK-NEXT: dealloc_return
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; CHECK-NEXT: } // 8-byte Folded Reload
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b0:
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%v0 = shl i32 1, %a2
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%v1 = and i32 %v0, %a1
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%v2 = icmp eq i32 %v1, 0
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br i1 %v2, label %b2, label %b1
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b1: ; preds = %b0
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tail call void @f1() #0
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br label %b3
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b2: ; preds = %b0
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%v3 = tail call i32 @f2() #0
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br label %b3
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b3: ; preds = %b2, %b1
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%v4 = add nsw i32 %a1, 2
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%v5 = tail call i32 @f3(i32 %a0, i32 %v4) #0
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ret i32 0
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}
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declare void @f1(...)
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declare i32 @f2(...)
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declare i32 @f3(...)
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attributes #0 = { nounwind }
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