42b70793a1
Reference: https://gcc.gnu.org/onlinedocs/gccint/Machine-Constraints.html k: A memory operand whose address is formed by a base register and (optionally scaled) index register. m: A memory operand whose address is formed by a base register and offset that is suitable for use in instructions with the same addressing mode as st.w and ld.w. ZB: An address that is held in a general-purpose register. The offset is zero. ZC: A memory operand whose address is formed by a base register and offset that is suitable for use in instructions with the same addressing mode as ll.w and sc.w. Note: The INLINEASM SDNode flags in below tests are updated because the new introduced enum `Constraint_k` is added before `Constraint_m`. llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll llvm/test/CodeGen/X86/callbr-asm-kill.mir This patch passes `ninja check-all` on a X86 machine with all official targets and the LoongArch target enabled. Differential Revision: https://reviews.llvm.org/D134638
34 lines
1.1 KiB
LLVM
34 lines
1.1 KiB
LLVM
; RUN: llc --mtriple=loongarch64 --verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefix=ASM
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; RUN: llc --mtriple=loongarch64 --print-after-isel -o /dev/null 2>&1 < %s \
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; RUN: | FileCheck %s --check-prefix=MACHINE-INSTR
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define i64 @k_variable_offset(ptr %p, i64 %idx) nounwind {
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; ASM-LABEL: k_variable_offset:
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; ASM: # %bb.0:
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; ASM-NEXT: #APP
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; ASM-NEXT: ldx.d $a0, $a0, $a1
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; ASM-NEXT: #NO_APP
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; ASM-NEXT: ret
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%1 = getelementptr inbounds i8, ptr %p, i64 %idx
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;; Make sure machine instr with this 'k' constraint is printed correctly.
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; MACHINE-INSTR: INLINEASM{{.*}}[mem:k]
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%2 = call i64 asm "ldx.d $0, $1", "=r,*k"(ptr elementtype(i64) %1)
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ret i64 %2
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}
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define i64 @k_constant_offset(ptr %p) nounwind {
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; ASM-LABEL: k_constant_offset:
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; ASM: # %bb.0:
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; ASM-NEXT: ori $a1, $zero, 5
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; ASM-NEXT: #APP
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; ASM-NEXT: ldx.d $a0, $a0, $a1
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; ASM-NEXT: #NO_APP
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; ASM-NEXT: ret
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%1 = getelementptr inbounds i8, ptr %p, i64 5
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;; Make sure machine instr with this 'k' constraint is printed correctly.
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; MACHINE-INSTR: INLINEASM{{.*}}[mem:k]
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%2 = call i64 asm "ldx.d $0, $1", "=r,*k"(ptr elementtype(i64) %1)
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ret i64 %2
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}
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