e415cb1d61
Print $zero register if operand is zero, otherwise print it normally. Clang is highly compatible [1] with GCC inline assembly extensions, allowing the same set of constraints, modifiers and operands as GCC inline assembly. This patch tries to make it compatible regarding LoongArch specific operand modifiers. GCC supports many modifiers [2], but it seems that only x86 and msp430 are documented [3][4]. I don't know if any other modifiers are being used except the 'z' in Linux [5]. [1]: https://clang.llvm.org/compatibility.html#inline-asm [2]: https://github.com/gcc-mirror/gcc/blob/master/gcc/config/loongarch/loongarch.cc#L4884-L4911 [3]: https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#x86Operandmodifiers [4]: https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#msp430Operandmodifiers [5]: https://github.com/torvalds/linux/blob/master/arch/loongarch/include/asm/cmpxchg.h#L17 Differential Revision: https://reviews.llvm.org/D136841
26 lines
834 B
LLVM
26 lines
834 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 --verify-machineinstrs < %s | FileCheck %s
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; RUN: llc --mtriple=loongarch64 --verify-machineinstrs < %s | FileCheck %s
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define i32 @modifier_z_zero(i32 %a) nounwind {
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; CHECK-LABEL: modifier_z_zero:
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; CHECK: # %bb.0:
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; CHECK-NEXT: #APP
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; CHECK-NEXT: add.w $a0, $a0, $zero
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: ret
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%1 = tail call i32 asm "add.w $0, $1, ${2:z}", "=r,r,ri"(i32 %a, i32 0)
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ret i32 %1
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}
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define i32 @modifier_z_nonzero(i32 %a) nounwind {
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; CHECK-LABEL: modifier_z_nonzero:
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; CHECK: # %bb.0:
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; CHECK-NEXT: #APP
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; CHECK-NEXT: addi.w $a0, $a0, 1
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: ret
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%1 = tail call i32 asm "addi.w $0, $1, ${2:z}", "=r,r,ri"(i32 %a, i32 1)
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ret i32 %1
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}
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