394f30919a
This patch adds support for constraints `f`, `l`, `I`, `K` according to [1]. The remain constraints (`k`, `m`, `ZB`, `ZC`) will be added later as they are a little more complex than the others. f: A floating-point register (if available). l: A signed 16-bit constant. I: A signed 12-bit constant (for arithmetic instructions). K: An unsigned 12-bit constant (for logic instructions). For now, no need to support register alias (e.g. `$a0`) in llvm as clang will correctly decode the usage of register name aliases into their official names. And AFAIK, the not yet upstreamed `rustc` for LoongArch will always use official register names (e.g. `$r4`). [1] https://gcc.gnu.org/onlinedocs/gccint/Machine-Constraints.html Differential Revision: https://reviews.llvm.org/D134157
110 lines
3.5 KiB
LLVM
110 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 --verify-machineinstrs < %s \
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; RUN: | FileCheck --check-prefix=LA32 %s
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; RUN: llc --mtriple=loongarch64 --verify-machineinstrs < %s \
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; RUN: | FileCheck --check-prefix=LA64 %s
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;; These test that we can use architectural names ($r*) refer to registers in
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;; inline asm constraint lists. In each case, the named register should be used
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;; for the source register of the `addi.w`. It is very likely that `$a0` will
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;; be chosen as the designation register, but this is left to the compiler to
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;; choose.
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;;
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;; Parenthesised registers in comments are the other aliases for this register.
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;; NOTE: This test has to pass in 0 to the inline asm, because that's the only
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;; value `$r0` (`$zero`) can take.
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define i32 @register_r0() nounwind {
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; LA32-LABEL: register_r0:
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; LA32: # %bb.0:
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; LA32-NEXT: #APP
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; LA32-NEXT: addi.w $a0, $zero, 0
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; LA32-NEXT: #NO_APP
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; LA32-NEXT: ret
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;
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; LA64-LABEL: register_r0:
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; LA64: # %bb.0:
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; LA64-NEXT: #APP
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; LA64-NEXT: addi.w $a0, $zero, 0
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; LA64-NEXT: #NO_APP
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; LA64-NEXT: ret
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%1 = tail call i32 asm "addi.w $0, $1, 0", "=r,{$r0}"(i32 0)
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ret i32 %1
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}
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define i32 @register_r4(i32 %a) nounwind {
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; LA32-LABEL: register_r4:
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; LA32: # %bb.0:
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; LA32-NEXT: #APP
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; LA32-NEXT: addi.w $a0, $a0, 1
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; LA32-NEXT: #NO_APP
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; LA32-NEXT: ret
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;
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; LA64-LABEL: register_r4:
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; LA64: # %bb.0:
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; LA64-NEXT: #APP
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; LA64-NEXT: addi.w $a0, $a0, 1
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; LA64-NEXT: #NO_APP
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; LA64-NEXT: ret
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%1 = tail call i32 asm "addi.w $0, $1, 1", "=r,{$r4}"(i32 %a)
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ret i32 %1
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}
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;; NOTE: This test uses `$r22` (`$s9`, `$fp`) as an input, so it should be saved.
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define i32 @register_r22(i32 %a) nounwind {
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; LA32-LABEL: register_r22:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $sp, $sp, -16
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; LA32-NEXT: st.w $fp, $sp, 12 # 4-byte Folded Spill
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; LA32-NEXT: move $fp, $a0
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; LA32-NEXT: #APP
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; LA32-NEXT: addi.w $a0, $fp, 1
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; LA32-NEXT: #NO_APP
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; LA32-NEXT: ld.w $fp, $sp, 12 # 4-byte Folded Reload
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; LA32-NEXT: addi.w $sp, $sp, 16
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; LA32-NEXT: ret
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;
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; LA64-LABEL: register_r22:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.d $sp, $sp, -16
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; LA64-NEXT: st.d $fp, $sp, 8 # 8-byte Folded Spill
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; LA64-NEXT: move $fp, $a0
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; LA64-NEXT: #APP
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; LA64-NEXT: addi.w $a0, $fp, 1
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; LA64-NEXT: #NO_APP
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; LA64-NEXT: ld.d $fp, $sp, 8 # 8-byte Folded Reload
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; LA64-NEXT: addi.d $sp, $sp, 16
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; LA64-NEXT: ret
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%1 = tail call i32 asm "addi.w $0, $1, 1", "=r,{$r22}"(i32 %a)
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ret i32 %1
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}
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;; NOTE: This test uses `$r31` (`$s8`) as an input, so it should be saved.
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define i32 @register_r31(i32 %a) nounwind {
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; LA32-LABEL: register_r31:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $sp, $sp, -16
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; LA32-NEXT: st.w $s8, $sp, 12 # 4-byte Folded Spill
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; LA32-NEXT: move $s8, $a0
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; LA32-NEXT: #APP
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; LA32-NEXT: addi.w $a0, $s8, 1
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; LA32-NEXT: #NO_APP
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; LA32-NEXT: ld.w $s8, $sp, 12 # 4-byte Folded Reload
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; LA32-NEXT: addi.w $sp, $sp, 16
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; LA32-NEXT: ret
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;
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; LA64-LABEL: register_r31:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.d $sp, $sp, -16
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; LA64-NEXT: st.d $s8, $sp, 8 # 8-byte Folded Spill
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; LA64-NEXT: move $s8, $a0
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; LA64-NEXT: #APP
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; LA64-NEXT: addi.w $a0, $s8, 1
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; LA64-NEXT: #NO_APP
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; LA64-NEXT: ld.d $s8, $sp, 8 # 8-byte Folded Reload
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; LA64-NEXT: addi.d $sp, $sp, 16
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; LA64-NEXT: ret
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%1 = tail call i32 asm "addi.w $0, $1, 1", "=r,{$r31}"(i32 %a)
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ret i32 %1
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}
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