9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
35 lines
1.1 KiB
YAML
35 lines
1.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -run-pass none -o - %s | FileCheck %s
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--- |
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define amdgpu_kernel void @flags() {
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ret void
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}
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declare void @foo()
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...
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---
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name: flags
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liveins:
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- { reg: '$sgpr0_sgpr1' }
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frameInfo:
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maxAlignment: 8
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registers:
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- { id: 0, class: sreg_64, preferred-register: '' }
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- { id: 1, class: sreg_64, preferred-register: '' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: flags
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; CHECK: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @foo + 4, target-flags(amdgpu-rel32-hi) @foo + 12, implicit-def dead $scc
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; CHECK: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 target-flags(amdgpu-gotprel) @foo
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; CHECK: S_ENDPGM 0
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%0 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @foo + 4, target-flags(amdgpu-rel32-hi) @foo + 12, implicit-def dead $scc
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%1 = S_MOV_B64 target-flags(amdgpu-gotprel) @foo
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%2:sreg_32 = S_MOV_B32 target-flags(amdgpu-abs32-lo) @foo
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%3:sreg_32 = S_MOV_B32 target-flags(amdgpu-abs32-hi) @foo
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S_ENDPGM 0
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...
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