690085c9b7
RISCVMachineFunctionInfo has some fields like VarArgsFrameIndex and VarArgsSaveSize are calculated at ISel lowering stage, those info are not contained in MIR files, that cause test cases rely on those field can't not reproduce correctly by MIR dump files. This patch adding the MIR read/write for those fields. Reviewed By: frasercrmck Differential Revision: https://reviews.llvm.org/D123178
139 lines
6.0 KiB
YAML
139 lines
6.0 KiB
YAML
# RUN: llc -mtriple=riscv64 -run-pass none %s -o - | FileCheck %s
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--- |
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; ModuleID = 'foo.ll'
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source_filename = "foo.ll"
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target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
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target triple = "riscv64"
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define void @foo(i32 %0, ...) {
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ret void
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}
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...
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---
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name: foo
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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failsVerification: false
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tracksDebugUserValues: false
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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- { id: 2, class: gpr, preferred-register: '' }
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- { id: 3, class: gpr, preferred-register: '' }
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- { id: 4, class: gpr, preferred-register: '' }
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- { id: 5, class: gpr, preferred-register: '' }
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- { id: 6, class: gpr, preferred-register: '' }
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- { id: 7, class: gpr, preferred-register: '' }
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liveins:
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- { reg: '$x11', virtual-reg: '%1' }
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- { reg: '$x12', virtual-reg: '%2' }
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- { reg: '$x13', virtual-reg: '%3' }
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- { reg: '$x14', virtual-reg: '%4' }
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- { reg: '$x15', virtual-reg: '%5' }
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- { reg: '$x16', virtual-reg: '%6' }
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- { reg: '$x17', virtual-reg: '%7' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 1
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 4294967295
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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hasTailCall: false
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localFrameSize: 0
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savePoint: ''
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restorePoint: ''
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fixedStack:
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- { id: 0, type: default, offset: -8, size: 8, alignment: 8, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, type: default, offset: -16, size: 8, alignment: 16, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 2, type: default, offset: -24, size: 8, alignment: 8, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 3, type: default, offset: -32, size: 8, alignment: 16, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 4, type: default, offset: -40, size: 8, alignment: 8, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 5, type: default, offset: -48, size: 8, alignment: 16, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 6, type: default, offset: -56, size: 8, alignment: 8, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 7, type: default, offset: -64, size: 8, alignment: 16, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 8, type: default, offset: -56, size: 8, alignment: 8, stack-id: default,
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isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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stack: []
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callSites: []
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debugValueSubstitutions: []
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constants: []
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machineFunctionInfo:
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varArgsFrameIndex: -1
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varArgsSaveSize: 64
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body: |
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bb.0 (%ir-block.1):
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liveins: $x11, $x12, $x13, $x14, $x15, $x16, $x17
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; CHECK-LABEL: name: foo
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; CHECK: machineFunctionInfo:
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; CHECK-NEXT: varArgsFrameIndex: -1
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; CHECK-NEXT: varArgsSaveSize: 64
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; CHECK: liveins: $x11, $x12, $x13, $x14, $x15, $x16, $x17
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x17
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x16
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr = COPY $x15
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr = COPY $x14
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; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr = COPY $x13
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; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr = COPY $x12
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; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: SD [[COPY]], %fixed-stack.8, 0 :: (store (s64))
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; CHECK-NEXT: SD [[COPY1]], %fixed-stack.7, 0 :: (store (s64) into %fixed-stack.7, align 16)
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; CHECK-NEXT: SD [[COPY2]], %fixed-stack.6, 0 :: (store (s64))
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; CHECK-NEXT: SD [[COPY3]], %fixed-stack.5, 0 :: (store (s64) into %fixed-stack.5, align 16)
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; CHECK-NEXT: SD [[COPY4]], %fixed-stack.4, 0 :: (store (s64))
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; CHECK-NEXT: SD [[COPY5]], %fixed-stack.3, 0 :: (store (s64) into %fixed-stack.3, align 16)
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; CHECK-NEXT: SD [[COPY6]], %fixed-stack.2, 0 :: (store (s64))
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; CHECK-NEXT: PseudoRET
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%7:gpr = COPY $x17
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%6:gpr = COPY $x16
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%5:gpr = COPY $x15
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%4:gpr = COPY $x14
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%3:gpr = COPY $x13
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%2:gpr = COPY $x12
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%1:gpr = COPY $x11
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SD %7, %fixed-stack.0, 0 :: (store (s64))
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SD %6, %fixed-stack.1, 0 :: (store (s64) into %fixed-stack.1, align 16)
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SD %5, %fixed-stack.2, 0 :: (store (s64))
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SD %4, %fixed-stack.3, 0 :: (store (s64) into %fixed-stack.3, align 16)
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SD %3, %fixed-stack.4, 0 :: (store (s64))
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SD %2, %fixed-stack.5, 0 :: (store (s64) into %fixed-stack.5, align 16)
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SD %1, %fixed-stack.6, 0 :: (store (s64))
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PseudoRET
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...
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