d391e4fe84
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth. Helps prevent future scheduler model mismatches like those that were only addressed in D44687. Differential Revision: https://reviews.llvm.org/D113302
26 lines
540 B
YAML
26 lines
540 B
YAML
# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# This test ensures that the MIR parser reports an error when parsing an invalid
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# constant value.
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--- |
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define double @test(double %a, float %b) {
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entry:
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%c = fadd double %a, 3.250000e+00
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ret double %c
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}
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...
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---
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name: test
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constants:
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- id: 0
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# CHECK: [[@LINE+1]]:19: expected type
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value: 'dub 3.250000e+00'
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body: |
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bb.0.entry:
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%xmm0 = ADDSDrm killed %xmm0, %rip, 1, _, %const.0, _
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RET64 %xmm0
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...
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