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clang-p2996/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
Simon Pilgrim d391e4fe84 [X86] Update RET/LRET instruction to use the same naming convention as IRET (PR36876). NFC
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth.

Helps prevent future scheduler model mismatches like those that were only addressed in D44687.

Differential Revision: https://reviews.llvm.org/D113302
2021-11-07 15:06:54 +00:00

43 lines
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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses basic block successors and
# probabilities correctly.
--- |
define i32 @foo(i32 %a) {
entry:
%0 = icmp sle i32 %a, 10
br i1 %0, label %less, label %exit
less:
ret i32 0
exit:
ret i32 %a
}
...
---
name: foo
body: |
; CHECK-LABEL: bb.0.entry:
; CHECK: successors: %bb.1(0x2a3d70a4), %bb.2(0x55c28f5c)
; CHECK-LABEL: bb.1.less:
bb.0.entry:
successors: %bb.1 (33), %bb.2(67)
liveins: $edi
CMP32ri8 $edi, 10, implicit-def $eflags
JCC_1 %bb.2, 15, implicit killed $eflags
bb.1.less:
$eax = MOV32r0 implicit-def dead $eflags
RET64 killed $eax
bb.2.exit:
liveins: $edi
$eax = COPY killed $edi
RET64 killed $eax
...