48904e9452
Summary: This catches malformed mir files which specify alignment as log2 instead of pow2. See https://reviews.llvm.org/D65945 for reference, This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67433 llvm-svn: 371608
65 lines
2.3 KiB
YAML
65 lines
2.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
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--- |
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define void @e_single_precision() {entry: ret void}
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define void @e_double_precision() {entry: ret void}
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...
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---
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name: e_single_precision
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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; FP32-LABEL: name: e_single_precision
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; FP32: [[LUi:%[0-9]+]]:gpr32 = LUi 16429
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; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 63572
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; FP32: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 [[ORi]]
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; FP32: $f0 = COPY [[MTC1_]]
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; FP32: RetRA implicit $f0
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; FP64-LABEL: name: e_single_precision
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; FP64: [[LUi:%[0-9]+]]:gpr32 = LUi 16429
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; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 63572
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; FP64: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 [[ORi]]
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; FP64: $f0 = COPY [[MTC1_]]
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; FP64: RetRA implicit $f0
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%0:fprb(s32) = G_FCONSTANT float 0x4005BF0A80000000
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$f0 = COPY %0(s32)
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RetRA implicit $f0
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...
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---
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name: e_double_precision
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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; FP32-LABEL: name: e_double_precision
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; FP32: [[LUi:%[0-9]+]]:gpr32 = LUi 16389
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; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 48906
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; FP32: [[LUi1:%[0-9]+]]:gpr32 = LUi 35604
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; FP32: [[ORi1:%[0-9]+]]:gpr32 = ORi [[LUi1]], 22377
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; FP32: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 [[ORi1]], [[ORi]]
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; FP32: $d0 = COPY [[BuildPairF64_]]
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; FP32: RetRA implicit $d0
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; FP64-LABEL: name: e_double_precision
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; FP64: [[LUi:%[0-9]+]]:gpr32 = LUi 16389
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; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 48906
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; FP64: [[LUi1:%[0-9]+]]:gpr32 = LUi 35604
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; FP64: [[ORi1:%[0-9]+]]:gpr32 = ORi [[LUi1]], 22377
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; FP64: [[BuildPairF64_64_:%[0-9]+]]:fgr64 = BuildPairF64_64 [[ORi1]], [[ORi]]
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; FP64: $d0 = COPY [[BuildPairF64_64_]]
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; FP64: RetRA implicit $d0
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%0:fprb(s64) = G_FCONSTANT double 0x4005BF0A8B145769
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$d0 = COPY %0(s64)
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RetRA implicit $d0
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...
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