Files
clang-p2996/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/float_args.ll
Matt Arsenault 121541fdcd Mips/GlobalISel: Use more standard call lowering infrastructure
This also fixes some missing implicit uses on call instructions, adds
missing G_ASSERT_SEXT/ZEXT annotations, and some missing outgoing
sext/zexts. This also fixes not respecting tablegen requested type
promotions.

This starts treating f64 passed in i32 GPRs as a type of custom
assignment, which restores some previously XFAILed tests. This is due
to getNumRegistersForCallingConv returns a static value, but in this
case it is context dependent on other arguments.

Most of the ugliness is reproducing a hack CC_MipsO32 uses in
SelectionDAG. CC_MipsO32 depends on a bunch of vectors populated from
the original IR argument types in MipsCCState. The way this ends up
working in GlobalISel is it only ends up inspecting the most recently
added vector element. I'm pretty sure there are cleaner ways to do
this, but this seemed easier than fixing up the current DAG
handling. This is another case where it would be easier of the
CCAssignFns were passed the original type instead of only the
pre-legalized ones.

There's still a lot of junk here that shouldn't be necessary. This
also likely breaks big endian handling, but it wasn't complete/tested
anyway since the IRTranslator gives up on big endian targets.
2021-07-13 11:04:10 -04:00

125 lines
3.6 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32,FP32
; RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32,FP64
define float @float_in_fpr(float %a, float %b) {
; MIPS32-LABEL: float_in_fpr:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: mov.s $f0, $f14
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
ret float %b
}
define double @double_in_fpr(double %a, double %b) {
; MIPS32-LABEL: double_in_fpr:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: mov.d $f0, $f14
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
ret double %b
}
define float @float_in_gpr(i32 %a, float %b) {
; MIPS32-LABEL: float_in_gpr:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: mtc1 $5, $f0
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
ret float %b
}
define double @double_in_gpr(i32 %a, double %b) {
; FP32-LABEL: double_in_gpr:
; FP32: # %bb.0: # %entry
; FP32-NEXT: mtc1 $6, $f0
; FP32-NEXT: mtc1 $7, $f1
; FP32-NEXT: jr $ra
; FP32-NEXT: nop
;
; FP64-LABEL: double_in_gpr:
; FP64: # %bb.0: # %entry
; FP64-NEXT: mtc1 $6, $f0
; FP64-NEXT: mthc1 $7, $f0
; FP64-NEXT: jr $ra
; FP64-NEXT: nop
entry:
ret double %b
}
define float @call_float_in_fpr(float %a, float %b) {
; MIPS32-LABEL: call_float_in_fpr:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: addiu $sp, $sp, -24
; MIPS32-NEXT: .cfi_def_cfa_offset 24
; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
; MIPS32-NEXT: .cfi_offset 31, -4
; MIPS32-NEXT: jal float_in_fpr
; MIPS32-NEXT: nop
; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
; MIPS32-NEXT: addiu $sp, $sp, 24
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
%call = call float @float_in_fpr(float %a, float %b)
ret float %call
}
define double @call_double_in_fpr(double %a, double %b) {
; MIPS32-LABEL: call_double_in_fpr:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: addiu $sp, $sp, -24
; MIPS32-NEXT: .cfi_def_cfa_offset 24
; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
; MIPS32-NEXT: .cfi_offset 31, -4
; MIPS32-NEXT: jal double_in_fpr
; MIPS32-NEXT: nop
; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
; MIPS32-NEXT: addiu $sp, $sp, 24
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
%call = call double @double_in_fpr(double %a, double %b)
ret double %call
}
define float @call_float_in_gpr(i32 %a, float %b) {
; MIPS32-LABEL: call_float_in_gpr:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: addiu $sp, $sp, -24
; MIPS32-NEXT: .cfi_def_cfa_offset 24
; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
; MIPS32-NEXT: .cfi_offset 31, -4
; MIPS32-NEXT: jal float_in_gpr
; MIPS32-NEXT: nop
; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
; MIPS32-NEXT: addiu $sp, $sp, 24
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
%call = call float @float_in_gpr(i32 %a, float %b)
ret float %call
}
define double @call_double_in_gpr(i32 %a, double %b) {
; MIPS32-LABEL: call_double_in_gpr:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: addiu $sp, $sp, -24
; MIPS32-NEXT: .cfi_def_cfa_offset 24
; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
; MIPS32-NEXT: .cfi_offset 31, -4
; MIPS32-NEXT: jal double_in_gpr
; MIPS32-NEXT: nop
; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
; MIPS32-NEXT: addiu $sp, $sp, 24
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
%call = call double @double_in_gpr(i32 %a, double %b)
ret double %call
}