6b2fd7aed6
FastISel may create a redundant BGTZ terminal which fallthroughes.
```
BGTZ %2:gpr32, %bb.1, implicit-def $at
bb.1.bb1:
; predecessors: %bb.0
```
The `!I->isBarrier()` check in
MipsAsmPrinter::isBlockOnlyReachableByFallthrough
will incorrectly not print a label, leading to a `Undefined temporary
symbol `
error when we try assembling the output assembly file. See the updated
`Fast-ISel/pr40325.ll` and
https://github.com/rust-lang/rust/issues/108835
In addition, the `SwitchInst` condition is too conservative and prints
many unneeded labels (see the updated tests).
Just use the generic isBlockOnlyReachableByFallthrough, updated by
commit 1995b9fead for SPARC, which also
handles MIPS.
67 lines
1.9 KiB
LLVM
67 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; We used to generate a mul+mflo sequence instead of shifting by 2/3 to get the jump table address
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; RUN: llc %s -O2 -mtriple=mips64-unknown-freebsd -target-abi n64 -relocation-model=pic -o - | FileCheck %s
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define i64 @test(i64 %arg) {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lui $1, %hi(%neg(%gp_rel(test)))
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; CHECK-NEXT: daddu $2, $1, $25
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; CHECK-NEXT: sltiu $1, $4, 11
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; CHECK-NEXT: beqz $1, .LBB0_4
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; CHECK-NEXT: nop
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: daddiu $1, $2, %lo(%neg(%gp_rel(test)))
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; CHECK-NEXT: dsll $2, $4, 3
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; CHECK-NEXT: ld $3, %got_page(.LJTI0_0)($1)
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; CHECK-NEXT: daddu $2, $2, $3
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; CHECK-NEXT: ld $2, %got_ofst(.LJTI0_0)($2)
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; CHECK-NEXT: daddu $1, $2, $1
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; CHECK-NEXT: jr $1
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; CHECK-NEXT: nop
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; CHECK-NEXT: .LBB0_2: # %sw.bb
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: daddiu $2, $zero, 1
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; CHECK-NEXT: .LBB0_3: # %sw.bb1
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: daddiu $2, $zero, 0
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; CHECK-NEXT: .LBB0_4: # %default
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; CHECK-NEXT: jr $ra
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; CHECK-NEXT: daddiu $2, $zero, 1234
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; Previously this dsll was the following sequence:
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; daddiu $2, $zero, 8
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; dmult $4, $2
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; mflo $2
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entry:
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switch i64 %arg, label %default [
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i64 0, label %sw.bb
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i64 3, label %sw.bb
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i64 5, label %sw.bb
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i64 10, label %sw.bb1
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]
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default:
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ret i64 1234
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sw.bb:
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ret i64 1
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sw.bb1:
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ret i64 0
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}
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; CHECK-LABEL: .section .rodata,"a",@progbits
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; CHECK-NEXT: .p2align 3
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; CHECK-LABEL: .LJTI0_0:
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; CHECK-NEXT: .gpdword .LBB0_2
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; CHECK-NEXT: .gpdword .LBB0_4
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; CHECK-NEXT: .gpdword .LBB0_4
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; CHECK-NEXT: .gpdword .LBB0_2
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; CHECK-NEXT: .gpdword .LBB0_4
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; CHECK-NEXT: .gpdword .LBB0_2
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; CHECK-NEXT: .gpdword .LBB0_4
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; CHECK-NEXT: .gpdword .LBB0_4
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; CHECK-NEXT: .gpdword .LBB0_4
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; CHECK-NEXT: .gpdword .LBB0_4
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; CHECK-NEXT: .gpdword .LBB0_3
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