d492faa7aa
Summary: This patch adds support for getting the 'activemask' instruction's value without needing to use inline assembly. See the relevant PTX reference for details. https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#parallel-synchronization-and-communication-instructions-activemask
39 lines
961 B
LLVM
39 lines
961 B
LLVM
; RUN: llc < %s -march=nvptx64 -O2 -mcpu=sm_52 -mattr=+ptx62 | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_52 -mattr=+ptx62 | %ptxas-verify %}
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declare i32 @llvm.nvvm.activemask()
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; CHECK-LABEL: activemask(
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;
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; CHECK: activemask.b32 %[[REG:.+]];
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; CHECK-NEXT: st.param.b32 [func_retval0+0], %[[REG]];
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; CHECK-NEXT: ret;
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define dso_local i32 @activemask() {
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entry:
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%mask = call i32 @llvm.nvvm.activemask()
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ret i32 %mask
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}
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; CHECK-LABEL: convergent(
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;
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; CHECK: activemask.b32 %[[REG:.+]];
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; CHECK: activemask.b32 %[[REG]];
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; CHECK: .param.b32 [func_retval0+0], %[[REG]];
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; CHECK-NEXT: ret;
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define dso_local i32 @convergent(i1 %cond) {
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entry:
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br i1 %cond, label %if.else, label %if.then
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if.then:
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%0 = call i32 @llvm.nvvm.activemask()
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br label %if.end
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if.else:
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%1 = call i32 @llvm.nvvm.activemask()
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br label %if.end
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if.end:
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%mask = phi i32 [ %0, %if.then ], [ %1, %if.else ]
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ret i32 %mask
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}
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