ef8655adc8
CUDA-12 no longer supports 32-bit compilation. Tests agnostic to 32/64 compilation mode are switched to use nvptx64. Tests that do care about it have 32-bit ptxas compilation disabled with cuda-12+. Differential Revision: https://reviews.llvm.org/D152199
30 lines
1000 B
LLVM
30 lines
1000 B
LLVM
; RUN: llc -march=nvptx64 < %s | FileCheck %s
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; RUN: %if ptxas %{ llc -march=nvptx64 < %s | %ptxas-verify %}
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; Test that %c works with immediates
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; CHECK-LABEL: test_inlineasm_c_output_template0
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; CHECK: //TEST 42
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define dso_local i32 @test_inlineasm_c_output_template0() {
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tail call void asm sideeffect "//TEST ${0:c}", "i"(i32 42)
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ret i32 42
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}
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; Test that %c works with global address
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; FIXME: seems this case isn't handled properly by
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; SelectionDAG TargetLowering::LowerAsmOperandForConstraint?
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; check: test_inlineasm_c_output_template1
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; check: //TEST baz
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;@baz = internal global i32 0, align 4
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;define dso_local i32 @test_inlineasm_c_output_template1() {
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; tail call void asm sideeffect "//TEST ${0:c}", "i"(ptr nonnull @baz)
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; ret i32 42
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;}
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; Test that %n works with immediates
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; CHECK-LABEL: test_inlineasm_c_output_template2
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; CHECK: //TEST -42
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define dso_local i32 @test_inlineasm_c_output_template2() {
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tail call void asm sideeffect "//TEST ${0:n}", "i"(i32 42)
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ret i32 42
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}
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