054931dbf1
When pointers are passed within aggregates, we sometimes end up with IR that loads them as integers and the converts them back to pointers. Typically it's due to a memcpy or SROA. E.g. https://godbolt.org/z/xM3n5daaa Normally we treat all pointers passed to a CUDA kernel as global pointers and the same treatment should be applied to the pointers we load/store as integers. Differential Revision: https://reviews.llvm.org/D142664
124 lines
4.5 KiB
LLVM
124 lines
4.5 KiB
LLVM
; RUN: opt < %s -S -nvptx-lower-args --mtriple nvptx64-nvidia-cuda | FileCheck %s --check-prefixes COMMON,IR,IRC
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; RUN: opt < %s -S -nvptx-lower-args --mtriple nvptx64-nvidia-nvcl | FileCheck %s --check-prefixes COMMON,IR,IRO
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; RUN: llc < %s -mcpu=sm_20 --mtriple nvptx64-nvidia-cuda | FileCheck %s --check-prefixes COMMON,PTX,PTXC
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; RUN: llc < %s -mcpu=sm_20 --mtriple nvptx64-nvidia-nvcl| FileCheck %s --check-prefixes COMMON,PTX,PTXO
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; RUN: %if ptxas %{ llc < %s -mcpu=sm_20 | %ptxas-verify %}
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target datalayout = "e-i64:64-i128:128-v16:16-v32:32-n16:32:64"
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target triple = "nvptx64-nvidia-cuda"
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%class.outer = type <{ %class.inner, i32, [4 x i8] }>
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%class.inner = type { ptr, ptr }
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; Check that nvptx-lower-args preserves arg alignment
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; COMMON-LABEL: load_alignment
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define void @load_alignment(ptr nocapture readonly byval(%class.outer) align 8 %arg) {
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entry:
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; IR: load %class.outer, ptr addrspace(101)
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; IR-SAME: align 8
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; PTX: ld.param.u64
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; PTX-NOT: ld.param.u8
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%arg.idx.val = load ptr, ptr %arg, align 8
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%arg.idx1 = getelementptr %class.outer, ptr %arg, i64 0, i32 0, i32 1
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%arg.idx1.val = load ptr, ptr %arg.idx1, align 8
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%arg.idx2 = getelementptr %class.outer, ptr %arg, i64 0, i32 1
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%arg.idx2.val = load i32, ptr %arg.idx2, align 8
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%arg.idx.val.val = load i32, ptr %arg.idx.val, align 4
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%add.i = add nsw i32 %arg.idx.val.val, %arg.idx2.val
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store i32 %add.i, ptr %arg.idx1.val, align 4
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; let the pointer escape so we still create a local copy this test uses to
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; check the load alignment.
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%tmp = call ptr @escape(ptr nonnull %arg.idx2)
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ret void
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}
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; COMMON-LABEL: ptr_generic
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define void @ptr_generic(ptr %out, ptr %in) {
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; IRC: %in3 = addrspacecast ptr %in to ptr addrspace(1)
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; IRC: %in4 = addrspacecast ptr addrspace(1) %in3 to ptr
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; IRC: %out1 = addrspacecast ptr %out to ptr addrspace(1)
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; IRC: %out2 = addrspacecast ptr addrspace(1) %out1 to ptr
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; PTXC: cvta.to.global.u64
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; PTXC: cvta.to.global.u64
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; PTXC: ld.global.u32
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; PTXC: st.global.u32
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; OpenCL can't make assumptions about incoming pointer, so we should generate
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; generic pointers load/store.
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; IRO-NOT: addrspacecast
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; PTXO-NOT: cvta.to.global
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; PTXO: ld.u32
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; PTXO: st.u32
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%v = load i32, ptr %in, align 4
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store i32 %v, ptr %out, align 4
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ret void
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}
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; COMMON-LABEL: ptr_nongeneric
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define void @ptr_nongeneric(ptr addrspace(1) %out, ptr addrspace(4) %in) {
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; IR-NOT: addrspacecast
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; PTX-NOT: cvta.to.global
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; PTX: ld.const.u32
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; PTX st.global.u32
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%v = load i32, ptr addrspace(4) %in, align 4
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store i32 %v, ptr addrspace(1) %out, align 4
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ret void
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}
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; COMMON-LABEL: ptr_as_int
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define void @ptr_as_int(i64 noundef %i, i32 noundef %v) {
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; IR: [[P:%.*]] = inttoptr i64 %i to ptr
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; IRC: [[P1:%.*]] = addrspacecast ptr [[P]] to ptr addrspace(1)
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; IRC: addrspacecast ptr addrspace(1) [[P1]] to ptr
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; IRO-NOT: addrspacecast
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; PTXC-DAG: ld.param.u64 [[I:%rd.*]], [ptr_as_int_param_0];
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; PTXC-DAG: ld.param.u32 [[V:%r.*]], [ptr_as_int_param_1];
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; PTXC: cvta.to.global.u64 %[[P:rd.*]], [[I]];
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; PTXC: st.global.u32 [%[[P]]], [[V]];
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; PTXO-DAG: ld.param.u64 %[[P:rd.*]], [ptr_as_int_param_0];
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; PTXO-DAG: ld.param.u32 [[V:%r.*]], [ptr_as_int_param_1];
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; PTXO: st.u32 [%[[P]]], [[V]];
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%p = inttoptr i64 %i to ptr
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store i32 %v, ptr %p, align 4
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ret void
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}
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%struct.S = type { i64 }
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; COMMON-LABEL: ptr_as_int_aggr
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define void @ptr_as_int_aggr(ptr nocapture noundef readonly byval(%struct.S) align 8 %s, i32 noundef %v) {
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; IR: [[S:%.*]] = addrspacecast ptr %s to ptr addrspace(101)
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; IR: [[I:%.*]] = load i64, ptr addrspace(101) [[S]], align 8
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; IR: [[P0:%.*]] = inttoptr i64 [[I]] to ptr
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; IRC: [[P1:%.*]] = addrspacecast ptr [[P]] to ptr addrspace(1)
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; IRC: [[P:%.*]] = addrspacecast ptr addrspace(1) [[P1]] to ptr
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; IRO-NOT: addrspacecast
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; PTXC-DAG: ld.param.u64 [[I:%rd.*]], [ptr_as_int_aggr_param_0];
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; PTXC-DAG: ld.param.u32 [[V:%r.*]], [ptr_as_int_aggr_param_1];
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; PTXC: cvta.to.global.u64 %[[P:rd.*]], [[I]];
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; PTXC: st.global.u32 [%[[P]]], [[V]];
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; PTXO-DAG: ld.param.u64 %[[P:rd.*]], [ptr_as_int_aggr_param_0];
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; PTXO-DAG: ld.param.u32 [[V:%r.*]], [ptr_as_int_aggr_param_1];
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; PTXO: st.u32 [%[[P]]], [[V]];
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%i = load i64, ptr %s, align 8
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%p = inttoptr i64 %i to ptr
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store i32 %v, ptr %p, align 4
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ret void
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}
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; Function Attrs: convergent nounwind
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declare dso_local ptr @escape(ptr) local_unnamed_addr
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!nvvm.annotations = !{!0, !1, !2, !3}
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!0 = !{ptr @ptr_generic, !"kernel", i32 1}
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!1 = !{ptr @ptr_nongeneric, !"kernel", i32 1}
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!2 = !{ptr @ptr_as_int, !"kernel", i32 1}
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!3 = !{ptr @ptr_as_int_aggr, !"kernel", i32 1}
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