ef8655adc8
CUDA-12 no longer supports 32-bit compilation. Tests agnostic to 32/64 compilation mode are switched to use nvptx64. Tests that do care about it have 32-bit ptxas compilation disabled with cuda-12+. Differential Revision: https://reviews.llvm.org/D152199
20 lines
948 B
LLVM
20 lines
948 B
LLVM
; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 -mattr=+ptx40 | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_30 -mattr=+ptx40 | %ptxas-verify %}
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; RUN: not --crash llc < %s -march=nvptx64 -mcpu=sm_20 2>&1 | FileCheck %s --check-prefix ERROR
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; ERROR: LLVM ERROR: .attribute(.managed) requires PTX version >= 4.0 and sm_30
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; CHECK: .visible .global .align 4 .u32 device_g;
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@device_g = addrspace(1) global i32 zeroinitializer
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; CHECK: .visible .global .attribute(.managed) .align 4 .u32 managed_g;
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@managed_g = addrspace(1) global i32 zeroinitializer
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; CHECK: .extern .global .align 4 .u32 decl_g;
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@decl_g = external addrspace(1) global i32, align 4
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; CHECK: .extern .global .attribute(.managed) .align 8 .b64 managed_decl_g;
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@managed_decl_g = external addrspace(1) global ptr, align 8
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!nvvm.annotations = !{!0, !1}
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!0 = !{ptr addrspace(1) @managed_g, !"managed", i32 1}
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!1 = !{ptr addrspace(1) @managed_decl_g, !"managed", i32 1}
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